1 /* $NetBSD: acpi_wakecode.S,v 1.13 2016/07/24 13:04:58 maxv Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Joerg Sonnenberger <joerg (at) netbsd.org> 5 * 6 * Copyright (c) 2002 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Takuya SHIOZAKI. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * This code is derived from FreeBSD. Original copyrights: 36 * 37 * Copyright (c) 2001 Takanori Watanabe <takawata (at) jp.freebsd.org> 38 * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki (at) jp.freebsd.org> 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 54 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 56 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 57 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 60 * SUCH DAMAGE. 61 * 62 * FreeBSD: src/sys/i386/acpica/acpi_wakecode.S,v 1.1 2001/07/20 06:07:31 takawata Exp 63 */ 64 65 #define _LOCORE 66 67 #include <machine/psl.h> 68 #include <machine/segments.h> 69 #include <machine/specialreg.h> 70 71 #define ACPI_WAKEUP_ADDR 0x3000 72 73 .text 74 .code16 75 .org 0 /* ACPI spec says: cs==(phys>>8), ip==(phys&0x000F) */ 76 .globl wakeup_16 77 wakeup_16: 78 nop 79 cli 80 cld 81 82 /* Set up segment registers for real mode */ 83 movw %cs,%ax 84 movw %ax,%ds 85 movw %ax,%ss 86 87 /* Small call stack */ 88 mov $0x1000,%sp 89 90 /* Clear flags */ 91 pushl $0 92 popfl 93 94 /* Only beep on reset if machdep.acpi_beep_on_reset=1 */ 95 cmpb $1,WAKEUP_beep_on_reset 96 jne 1f 97 movb $0xc0,%al 98 outb %al,$0x42 99 movb $0x04,%al 100 outb %al,$0x42 101 inb $0x61,%al 102 orb $0x3,%al 103 outb %al,$0x61 104 1: 105 106 /* Only reset the VBIOS if machdep.acpi_vbios_reset=1 */ 107 cmpb $1,WAKEUP_vbios_reset 108 jne 1f 109 110 /* Kick the VBIOS. */ 111 lcall $0xc000,$3 112 113 /* Reset registers in case the VBIOS changed them. */ 114 movw %cs,%ax 115 movw %ax,%ds 116 movw %ax,%ss 117 118 /* If we need to restore a VESA VBE mode, do it now */ 119 cmpb $0,WAKEUP_vesa_modenum 120 je 1f 121 movw WAKEUP_vesa_modenum,%bx 122 orw $0x4000,%bx 123 movw $0x4f02,%ax 124 int $0x10 125 126 movw %cs,%ax 127 movw %ax,%ds 128 movw %ax,%ss 129 1: 130 131 /* Disable beep again if machdep.acpi_beep_on_reset=1 */ 132 cmpb $1,WAKEUP_beep_on_reset 133 jne 1f 134 inb $0x61,%al 135 andb $0xfc,%al 136 outb %al,$0x61 137 1: 138 139 /* Load temporary 32bit GDT */ 140 #ifdef __clang__ 141 lgdt tmp_gdt 142 #else 143 data32 addr32 lgdt tmp_gdt 144 #endif 145 146 /* Enable protected mode without paging */ 147 mov %cr0,%eax 148 orl $(CR0_PE),%eax 149 mov %eax,%cr0 150 151 wakeup_sw32: 152 /* 153 * Switch to protected mode by intersegmental jump. 154 * Target and everything else has to compensate for the new origin 155 * as this is using the flat memory model now. 156 */ 157 158 ljmpl $0x8,$wakeup_32 + ACPI_WAKEUP_ADDR 159 160 .code32 161 .align 16 162 wakeup_32: 163 /* 164 * Switched to protected mode w/o paging 165 */ 166 nop 167 168 /* Set up segment registers and initial stack for protected mode */ 169 movw $0x10,%ax 170 movw %ax,%ds 171 movw %ax,%ss 172 173 movl $(ACPI_WAKEUP_ADDR + 4096),%esp 174 175 /* First, reset the PSL. */ 176 pushl $PSL_MBO 177 popfl 178 179 /* Enable PAE and potentially PSE */ 180 movl $(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT|CR4_PSE),%eax 181 movl %eax,%cr4 182 183 /* 184 * First switch to Long Mode. Do not restore the original 185 * MSR EFER value directly, as enabling the NX bit without 186 * paging will result in a GPF on AMD CPUs. 187 * 188 * Load the correct MSR EFER value now to not depend on the 189 * data segment register directly after switching to Long Mode. 190 * After this point, no instruction is allowed to clobber %ebx. 191 */ 192 movl WAKEUP_efer + ACPI_WAKEUP_ADDR,%ebx 193 movl $MSR_EFER,%ecx 194 rdmsr 195 orl $EFER_LME,%eax 196 wrmsr 197 198 /* Load temporary PML4, code will switch to full PML4 later */ 199 movl WAKEUP_r_cr3 + ACPI_WAKEUP_ADDR,%eax 200 movl %eax,%cr3 201 202 /* Enable paging */ 203 movl %cr0,%eax 204 orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax 205 movl %eax,%cr0 206 207 /* Flush the prefetch queue */ 208 jmp 1f 209 1: 210 211 /* Switch to temporary 64bit GDT */ 212 lgdt tmp_gdt64 + ACPI_WAKEUP_ADDR 213 214 /* Switch to long mode using intersegmental jump. */ 215 ljmp $0x8, $wakeup_64 + ACPI_WAKEUP_ADDR 216 217 .code64 218 wakeup_64: 219 220 /* 221 * Load the normal system value of MSR EFER. This includes 222 * enabling the SYSCALL extension and NXE (if supported). 223 */ 224 movl %ebx,%eax 225 movl $MSR_EFER,%ecx 226 wrmsr 227 228 /* Reload data segment with default value */ 229 movw $GSEL(GDATA_SEL, SEL_KPL),%ax 230 movw %ax,%ds 231 232 /* Restore registers */ 233 movq WAKEUP_curcpu + ACPI_WAKEUP_ADDR,%r8 234 movq WAKEUP_restorecpu + ACPI_WAKEUP_ADDR,%rbx 235 236 /* Continue with wakeup in the high-level wakeup code */ 237 jmp *%rbx 238 239 .align 8 240 tmp_gdt: 241 .word 0xffff 242 .long tmp_gdtable + ACPI_WAKEUP_ADDR 243 244 .align 8, 0 245 tmp_gdtable: 246 /* null */ 247 .word 0, 0 248 .byte 0, 0, 0, 0 249 /* code */ 250 .word 0xffff, 0 251 .byte 0, 0x9f, 0xcf, 0 252 /* data */ 253 .word 0xffff, 0 254 .byte 0, 0x93, 0xcf, 0 255 256 tmp_gdt64: 257 .word 0xffff 258 .long tmp_gdtable64 + ACPI_WAKEUP_ADDR 259 260 tmp_gdtable64: 261 .quad 0x0000000000000000 262 .quad 0x00af9a000000ffff 263 .quad 0x00cf92000000ffff 264 265 .align 16, 0 266 .global WAKEUP_r_cr3 267 WAKEUP_r_cr3: .quad 0 268 269 .global WAKEUP_restorecpu 270 WAKEUP_restorecpu: .quad 0 271 272 .global WAKEUP_vbios_reset 273 WAKEUP_vbios_reset: .byte 0 274 .global WAKEUP_vesa_modenum 275 WAKEUP_vesa_modenum: .word 0 276 .global WAKEUP_beep_on_reset 277 WAKEUP_beep_on_reset: .byte 0 278 279 .global WAKEUP_curcpu 280 WAKEUP_curcpu: .quad 0 281 .global WAKEUP_efer 282 WAKEUP_efer: .long 0 283
Indexes created Thu Sep 25 08:09:54 GMT 2025