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    Searched defs:uncore (Results 1 - 25 of 43) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_gt_pm_irq.c 21 struct intel_uncore *uncore = gt->uncore; local
34 intel_uncore_write(uncore, reg, mask);
69 struct intel_uncore *uncore = gt->uncore; local
74 intel_uncore_write(uncore, reg, reset_mask);
75 intel_uncore_write(uncore, reg, reset_mask);
76 intel_uncore_posting_read(uncore, reg);
82 struct intel_uncore *uncore = gt->uncore; local
    [all...]
intel_gt_types.h 35 struct intel_uncore *uncore; member in struct:intel_gt
gen6_ppgtt.c 39 struct intel_uncore *uncore = gt->uncore; local
44 intel_uncore_rmw(uncore, GAC_ECO_BITS, 0, ECOBITS_PPGTT_CACHE64B);
46 ecochk = intel_uncore_read(uncore, GAM_ECOCHK);
53 intel_uncore_write(uncore, GAM_ECOCHK, ecochk);
65 struct intel_uncore *uncore = gt->uncore; local
67 intel_uncore_rmw(uncore,
72 intel_uncore_rmw(uncore,
77 intel_uncore_rmw(uncore,
    [all...]
gen8_ppgtt.c 36 struct intel_uncore *uncore = ppgtt->vm.gt->uncore; local
50 intel_uncore_write(uncore,
52 intel_uncore_write(uncore,
62 intel_uncore_write(uncore,
65 intel_uncore_write(uncore,
76 intel_uncore_write(uncore, vgtif_reg(g2v_notify), msg);
intel_gt.c 31 gt->uncore = &i915->uncore;
54 struct intel_uncore *uncore = gt->uncore; local
56 intel_uncore_write(uncore, RING_CTL(base), 0);
57 intel_uncore_write(uncore, RING_HEAD(base), 0);
58 intel_uncore_write(uncore, RING_TAIL(base), 0);
59 intel_uncore_write(uncore, RING_START(base), 0);
84 struct intel_uncore *uncore = gt->uncore; local
162 struct intel_uncore *uncore = gt->uncore; local
226 struct intel_uncore *uncore = gt->uncore; local
283 struct intel_uncore *uncore = gt->uncore; local
    [all...]
intel_gt_irq.c 53 raw_reg_write(gt->uncore, GEN11_IIR_REG_SELECTOR(bank), BIT(bit));
61 ident = raw_reg_read(gt->uncore, GEN11_INTR_IDENTITY_REG(bank));
71 raw_reg_write(gt->uncore, GEN11_INTR_IDENTITY_REG(bank),
137 intr_dw = raw_reg_read(gt->uncore, GEN11_GT_INTR_DW(bank));
146 raw_reg_write(gt->uncore, GEN11_GT_INTR_DW(bank), intr_dw);
170 dw = raw_reg_read(gt->uncore, GEN11_GT_INTR_DW(bank));
184 raw_reg_write(gt->uncore, GEN11_GT_INTR_DW(bank), BIT(bit));
194 struct intel_uncore *uncore = gt->uncore; local
197 intel_uncore_write(uncore, GEN11_RENDER_COPY_INTR_ENABLE, 0)
216 struct intel_uncore *uncore = gt->uncore; local
348 struct intel_uncore *uncore = gt->uncore; local
358 struct intel_uncore *uncore = gt->uncore; local
416 struct intel_uncore *uncore = gt->uncore; local
425 struct intel_uncore *uncore = gt->uncore; local
    [all...]
intel_gtt.c 513 struct intel_uncore *uncore = gt->uncore; local
522 intel_uncore_write(uncore,
526 intel_uncore_write(uncore,
530 intel_uncore_write(uncore,
534 intel_uncore_write(uncore,
551 intel_uncore_rmw(uncore,
569 intel_uncore_write(uncore,
573 intel_uncore_read(uncore,
602 static void tgl_setup_private_ppat(struct intel_uncore *uncore)
    [all...]
intel_mocs.c 347 static void __init_mocs_table(struct intel_uncore *uncore,
355 intel_uncore_write_fw(uncore, _MMIO(addr + i * 4), mocs);
376 __init_mocs_table(engine->uncore, table, mocs_offset(engine));
408 struct intel_uncore *uncore = engine->uncore; local
413 intel_uncore_write_fw(uncore, GEN9_LNCFCMOCS(i), l3cc);
421 assert_forcewakes_active(engine->uncore, FORCEWAKE_ALL);
452 __init_mocs_table(gt->uncore, &table, global_mocs_offset());
intel_rc6.c 48 return rc6_to_gt(rc)->uncore;
56 static inline void set(struct intel_uncore *uncore, i915_reg_t reg, u32 val)
58 intel_uncore_write_fw(uncore, reg, val);
63 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
68 set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
69 set(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
71 set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
72 set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
74 set(uncore, RING_MAX_IDLE(engine->mmio_base), 10);
76 set(uncore, GUC_MAX_IDLE_COUNT, 0xA)
117 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
194 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
216 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
272 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
293 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
345 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
373 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
400 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
514 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
562 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
600 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
611 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
702 struct intel_uncore *uncore = rc6_to_uncore(rc6); local
    [all...]
debugfs_gt_pm.c 28 struct intel_uncore *uncore = gt->uncore; local
33 uncore->user_forcewake_count);
35 for_each_fw_domain(fw_domain, uncore, tmp)
51 with_intel_runtime_pm(gt->uncore->rpm, wakeref)
53 intel_uncore_read(gt->uncore, reg),
60 struct intel_uncore *uncore = gt->uncore; local
63 pw_status = intel_uncore_read(uncore, VLV_GTLC_PW_STATUS);
64 rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL)
84 struct intel_uncore *uncore = gt->uncore; local
171 struct intel_uncore *uncore = gt->uncore; local
250 struct intel_uncore *uncore = gt->uncore; local
562 struct intel_uncore *uncore = gt->uncore; local
    [all...]
intel_workarounds.c 535 intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
592 val = intel_uncore_read(engine->uncore, FF_MODE2);
822 intel_uncore_read(&i915->uncore, GEN10_MIRROR_FUSE3) &
983 wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
990 fw |= intel_uncore_forcewake_for_reg(uncore,
1014 wa_list_apply(struct intel_uncore *uncore, const struct i915_wa_list *wal)
1024 fw = wal_get_fw_for_rmw(uncore, wal);
1026 spin_lock_irqsave(&uncore->lock, flags);
1027 intel_uncore_forcewake_get__locked(uncore, fw);
1030 intel_uncore_rmw_fw(uncore, wa->reg, wa->mask, wa->val)
1304 struct intel_uncore *uncore = engine->uncore; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/uc/
intel_guc_fw.c 35 static void guc_prepare_xfer(struct intel_uncore *uncore)
45 intel_uncore_write(uncore, GUC_SHIM_CONTROL, shim_flags);
47 if (IS_GEN9_LP(uncore->i915))
48 intel_uncore_write(uncore, GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
50 intel_uncore_write(uncore, GEN9_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
52 if (IS_GEN(uncore->i915, 9)) {
54 intel_uncore_rmw(uncore, GEN7_MISCCPCTL,
58 intel_uncore_write(uncore, GUC_ARAT_C6DIS, 0x1FF);
64 struct intel_uncore *uncore)
74 intel_uncore_write(uncore, UOS_RSA_SCRATCH(i), rsa[i])
141 struct intel_uncore *uncore = gt->uncore; local
    [all...]
intel_guc.c 52 intel_uncore_write(gt->uncore, guc->notify_reg, GUC_SEND_TRIGGER);
81 fw_domains |= intel_uncore_forcewake_for_reg(gt->uncore,
107 WARN_ON_ONCE(intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
150 intel_uncore_write(gt->uncore,
152 intel_uncore_write(gt->uncore,
166 intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~0);
167 intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
318 struct intel_uncore *uncore = guc_to_gt(guc)->uncore; local
326 intel_uncore_forcewake_get(uncore, FORCEWAKE_BLITTER)
421 struct intel_uncore *uncore = guc_to_gt(guc)->uncore; local
545 struct intel_uncore *uncore = guc_to_gt(guc)->uncore; local
    [all...]
intel_uc.c 41 guc_status = intel_uncore_read(gt->uncore, GUC_STATUS);
152 intel_uncore_write(guc_to_gt(guc)->uncore, SOFT_SCRATCH(15), 0);
161 val = intel_uncore_read(guc_to_gt(guc)->uncore, SOFT_SCRATCH(15));
327 struct intel_uncore *uncore = gt->uncore; local
350 err = intel_uncore_write_and_verify(uncore, GUC_WOPCM_SIZE, size, mask,
356 err = intel_uncore_write_and_verify(uncore, DMA_GUC_WOPCM_OFFSET,
369 intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
372 intel_uncore_read(uncore, GUC_WOPCM_SIZE));
380 struct intel_uncore *uncore = gt->uncore local
    [all...]
intel_uc_fw.c 441 struct intel_uncore *uncore = gt->uncore; local
449 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
454 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset));
455 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));
458 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset);
459 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);
465 intel_uncore_write_fw(uncore, DMA_COPY_SIZE,
469 intel_uncore_write_fw(uncore, DMA_CTRL,
473 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100)
    [all...]
intel_guc_submission.c 242 intel_uncore_posting_read_fw(vma->vm->gt->uncore,
563 struct intel_uncore *uncore = gt->uncore; local
570 intel_uncore_rmw(uncore, GEN11_RENDER_COPY_INTR_ENABLE, dmask, 0);
571 intel_uncore_rmw(uncore, GEN11_VCS_VECS_INTR_ENABLE, dmask, 0);
576 struct intel_uncore *uncore = gt->uncore; local
583 intel_uncore_rmw(uncore, GEN11_RENDER_COPY_INTR_ENABLE, 0, dmask);
584 intel_uncore_rmw(uncore, GEN11_VCS_VECS_INTR_ENABLE, 0, dmask);
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_vgpu.c 85 * the uncore structure, so we need to access the BAR directly. Since
269 struct intel_uncore *uncore = &ggtt->vm.i915->uncore; local
280 intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
282 intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
284 intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
286 intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));
i915_gem_fence_reg.c 75 return fence->ggtt->vm.gt->uncore;
114 struct intel_uncore *uncore = fence_to_uncore(fence); local
126 intel_uncore_write_fw(uncore, fence_reg_lo, 0);
127 intel_uncore_posting_read_fw(uncore, fence_reg_lo);
129 intel_uncore_write_fw(uncore, fence_reg_hi, upper_32_bits(val));
130 intel_uncore_write_fw(uncore, fence_reg_lo, lower_32_bits(val));
131 intel_uncore_posting_read_fw(uncore, fence_reg_lo);
167 struct intel_uncore *uncore = fence_to_uncore(fence); local
170 intel_uncore_write_fw(uncore, reg, val);
171 intel_uncore_posting_read_fw(uncore, reg)
199 struct intel_uncore *uncore = fence_to_uncore(fence); local
237 struct intel_uncore *uncore = fence_to_uncore(fence); local
583 struct intel_uncore *uncore = ggtt->vm.gt->uncore; local
848 struct intel_uncore *uncore = ggtt->vm.gt->uncore; local
890 struct intel_uncore *uncore = gt->uncore; local
    [all...]
intel_sideband.c 101 struct intel_uncore *uncore = &i915->uncore; local
110 if (intel_wait_for_register(uncore,
120 intel_uncore_write_fw(uncore, VLV_IOSF_ADDR, addr);
121 intel_uncore_write_fw(uncore, VLV_IOSF_DATA, is_read ? 0 : *val);
122 intel_uncore_write_fw(uncore, VLV_IOSF_DOORBELL_REQ,
130 if (__intel_wait_for_register_fw(uncore,
134 *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA);
283 struct intel_uncore *uncore = &i915->uncore; local
387 struct intel_uncore *uncore = &i915->uncore; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_tc.c 42 modular_fia = intel_uncore_read(&i915->uncore,
65 struct intel_uncore *uncore = &i915->uncore; local
68 lane_mask = intel_uncore_read(uncore,
80 struct intel_uncore *uncore = &i915->uncore; local
83 pin_mask = intel_uncore_read(uncore,
127 struct intel_uncore *uncore = &i915->uncore; local
132 val = intel_uncore_read(uncore,
183 struct intel_uncore *uncore = &i915->uncore; local
214 struct intel_uncore *uncore = &i915->uncore; local
232 struct intel_uncore *uncore = &i915->uncore; local
262 struct intel_uncore *uncore = &i915->uncore; local
    [all...]
intel_gmbus.c 200 struct intel_uncore *uncore = &i915->uncore; local
205 reserved = intel_uncore_read_notrace(uncore, bus->gpio_reg) &
215 struct intel_uncore *uncore = &bus->dev_priv->uncore; local
218 intel_uncore_write_notrace(uncore,
221 intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved);
223 return (intel_uncore_read_notrace(uncore, bus->gpio_reg) &
230 struct intel_uncore *uncore = &bus->dev_priv->uncore; local
245 struct intel_uncore *uncore = &bus->dev_priv->uncore; local
264 struct intel_uncore *uncore = &bus->dev_priv->uncore; local
    [all...]
intel_crt.c 656 struct intel_uncore *uncore = &dev_priv->uncore; local
677 save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
678 save_vtotal = intel_uncore_read(uncore, vtotal_reg);
679 vblank = intel_uncore_read(uncore, vblank_reg);
688 intel_uncore_write(uncore, bclrpat_reg, 0x500050);
691 u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
692 intel_uncore_write(uncore,
695 intel_uncore_posting_read(uncore, pipeconf_reg);
699 st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/
i915_gem_stolen.c 78 struct intel_uncore *uncore = ggtt->vm.gt->uncore; local
96 ggtt_start = intel_uncore_read(uncore, PGTBL_CTL);
176 struct intel_uncore *uncore,
180 u32 reg_val = intel_uncore_read(uncore,
212 struct intel_uncore *uncore,
216 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED);
245 struct intel_uncore *uncore,
249 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED);
274 struct intel_uncore *uncore,
385 struct intel_uncore *uncore = &i915->uncore; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
mmio_context.c 355 struct intel_uncore *uncore = &dev_priv->uncore; local
378 fw = intel_uncore_forcewake_for_reg(uncore, reg,
383 intel_uncore_forcewake_get(uncore, fw);
385 intel_uncore_write_fw(uncore, reg, 0x1);
387 if (wait_for_atomic((intel_uncore_read_fw(uncore, reg) == 0), 50))
392 intel_uncore_forcewake_put(uncore, fw);
574 intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
576 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
  /src/sys/external/bsd/drm2/dist/drm/i915/selftests/
intel_uncore.c 150 struct intel_uncore *uncore = gt->uncore; local
186 wakeref = intel_runtime_pm_get(uncore->rpm);
188 for_each_fw_domain(domain, uncore, tmp) {
198 u32 __iomem *reg = uncore->regs + engine->mmio_base + r->offset;
205 fw_domains = intel_uncore_forcewake_for_reg(uncore, mmio,
210 for_each_fw_domain_masked(domain, fw_domains, uncore, tmp) {
220 intel_uncore_forcewake_get(uncore, fw_domains);
222 intel_uncore_forcewake_put(uncore, fw_domains);
225 for_each_fw_domain_masked(domain, fw_domains, uncore, tmp)
265 struct intel_uncore *uncore = gt->uncore; local
    [all...]

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