| /src/external/gpl3/binutils/dist/opcodes/ |
| sparc-opc.c | 88 #define v9b (MASK_V9B \ macro
146 { "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B, HWS_VB, 0 },
1023 wrasr (24, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick */
1024 wrasr (25, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick_cmpr */
1059 rdasr (24, HWCAP_VIS2, 0, v9b), /* rd %sys_tick,r */
1060 rdasr (25, HWCAP_VIS2, 0, v9b), /* rd %sys_tick_cmpr,r */
2114 { "edge8n", F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2115 { "edge8ln", F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2116 { "edge16n", F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2117 { "edge16ln", F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| sparc-opc.c | 88 #define v9b (MASK_V9B \ macro
146 { "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B, HWS_VB, 0 },
1023 wrasr (24, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick */
1024 wrasr (25, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick_cmpr */
1059 rdasr (24, HWCAP_VIS2, 0, v9b), /* rd %sys_tick,r */
1060 rdasr (25, HWCAP_VIS2, 0, v9b), /* rd %sys_tick_cmpr,r */
2114 { "edge8n", F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2115 { "edge8ln", F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2116 { "edge16n", F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2117 { "edge16ln", F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| sparc-opc.c | 88 #define v9b (MASK_V9B \ macro
146 { "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B, HWS_VB, 0 },
1023 wrasr (24, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick */
1024 wrasr (25, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick_cmpr */
1059 rdasr (24, HWCAP_VIS2, 0, v9b), /* rd %sys_tick,r */
1060 rdasr (25, HWCAP_VIS2, 0, v9b), /* rd %sys_tick_cmpr,r */
2114 { "edge8n", F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2115 { "edge8ln", F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2116 { "edge16n", F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2117 { "edge16ln", F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| sparc-opc.c | 88 #define v9b (MASK_V9B \ macro
146 { "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B, HWS_VB, 0 },
1023 wrasr (24, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick */
1024 wrasr (25, HWCAP_VIS2, 0, v9b), /* wr ...,%sys_tick_cmpr */
1059 rdasr (24, HWCAP_VIS2, 0, v9b), /* rd %sys_tick,r */
1060 rdasr (25, HWCAP_VIS2, 0, v9b), /* rd %sys_tick_cmpr,r */
2114 { "edge8n", F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2115 { "edge8ln", F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2116 { "edge16n", F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
2117 { "edge16ln", F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, HWCAP_VIS2, 0, v9b },
[all...] |
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-sparc.c | 221 v8plusa, v9, v9a, v9b, v9_64};
244 { "sparcvis2", "v9b", v9, 0, 1, 0, 0 },
245 { "sparcfmaf", "v9b", v9, 0, 1, HWCAP_FMAF, 0 },
246 { "sparcima", "v9b", v9, 0, 1, HWCAP_FMAF|HWCAP_IMA, 0 },
247 { "sparcvis3", "v9b", v9, 0, 1, HWCAP_FMAF|HWCAP_VIS3|HWCAP_HPC, 0 },
248 { "sparcvis3r", "v9b", v9, 0, 1, HWCAP_FMAF|HWCAP_VIS3|HWCAP_HPC|HWCAP_FJFMAU, 0 },
261 { "v8plusb", "v9b", v9, 0, 1, HWCAP_V8PLUS, 0 },
271 { "v9b", "v9b", v9, 0, 1, 0, 0 },
373 * -xarch=v9, -xarch=v9a, -xarch=v9b
220 v8plusa, v9, v9a, v9b, v9_64}; enumerator in enum:sparc_arch_types
[all...] |
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-sparc.c | 221 v8plusa, v9, v9a, v9b, v9_64};
244 { "sparcvis2", "v9b", v9, 0, 1, 0, 0 },
245 { "sparcfmaf", "v9b", v9, 0, 1, HWCAP_FMAF, 0 },
246 { "sparcima", "v9b", v9, 0, 1, HWCAP_FMAF|HWCAP_IMA, 0 },
247 { "sparcvis3", "v9b", v9, 0, 1, HWCAP_FMAF|HWCAP_VIS3|HWCAP_HPC, 0 },
248 { "sparcvis3r", "v9b", v9, 0, 1, HWCAP_FMAF|HWCAP_VIS3|HWCAP_HPC|HWCAP_FJFMAU, 0 },
261 { "v8plusb", "v9b", v9, 0, 1, HWCAP_V8PLUS, 0 },
271 { "v9b", "v9b", v9, 0, 1, 0, 0 },
372 * -xarch=v9, -xarch=v9a, -xarch=v9b
220 v8plusa, v9, v9a, v9b, v9_64}; enumerator in enum:sparc_arch_types
[all...] |
