| /src/sys/arch/mips/mips/ |
| cache_mipsNN.c | 67 * worry about the N different "ways".
81 * worry about the N different "ways".
94 * worry about the N different "ways".
112 const size_t ways = mci->mci_picache_ways; local
139 for (size_t way = 0; way < ways; way++) {
151 const size_t ways = mci->mci_pdcache_ways; local
180 * the way, we will be invalidating in two ways but eventually things
183 for (size_t way = 0; way < ways; way++) {
194 const size_t ways = mci->mci_sdcache_ways; local
223 * the way, we will be invalidating in two ways but eventually thing
[all...] |
| cache_r5k.c | 97 * worry about the N different "ways".
117 const size_t ways = mci->mci_picache_ways; local
144 for (size_t way = 0; way < ways; way++) {
159 * worry about the N different "ways".
169 const size_t ways = mci->mci_pdcache_ways; local
198 * the way, we will be invalidating in two ways but eventually things
201 for (size_t way = 0; way < ways; way++) {
|
| /src/sys/arch/x86/x86/ |
| identcpu_subr.c | 219 int type, level, ways, partitions, linesize, sets, totalsize; local
257 ways = __SHIFTOUT(descs[1], CPUID_DCP_WAYS) + 1;
263 totalsize = ways * partitions * linesize * sets;
265 ci->ci_cinfo[caitype].cai_associativity = ways;
|
| /src/sys/arch/sh3/sh3/ |
| cache_sh4.c | 78 int ways; local
94 ways = 1;
103 ways = 2;
115 ways = 2;
146 sh_cache_ways = ways;
148 sh_cache_alias_mask = (dcache_size / ways - 1) & ~PAGE_MASK;
149 sh_cache_prefer_mask = (dcache_size / ways - 1);
374 * Clear the specified bits on single 32-byte cache line. 2-ways.
396 * Clear the specified bits on 8 32-byte cache lines. 2-ways.
|
| /src/external/gpl3/gdb.old/dist/sim/frv/ |
| options.c | 52 '\0', "WAYS[,SETS[,LINESIZE]]", "Enable data cache",
55 '\0', "WAYS[,SETS[,LINESIZE]]", "Enable instruction cache",
97 address_word ways = 0, sets = 0, linesize = 0; local
102 chp = parse_size (chp, &ways);
103 ways = check_pow2 (ways, "WAYS", cache_name, sd);
120 cache->ways = ways;
|
| cache.h | 163 - ways must be a power of 2
167 unsigned configured_ways; /* Number of ways configured in each set. */
169 unsigned ways; /* Number of ways in each set. */ member in struct:__anon22089
181 /* The tags are stored by ways within sets in order to make computations
184 & ((cache)->tag_storage[(set) * (cache)->ways + (way)]) \
194 ((tag) - (cache)->tag_storage) & ~((cache)->ways - 1) \
199 CACHE_TAG_SET_START ((cache), (tag)) / (cache)->ways \
|
| /src/external/gpl3/gdb/dist/sim/frv/ |
| options.c | 52 '\0', "WAYS[,SETS[,LINESIZE]]", "Enable data cache",
55 '\0', "WAYS[,SETS[,LINESIZE]]", "Enable instruction cache",
97 address_word ways = 0, sets = 0, linesize = 0; local
102 chp = parse_size (chp, &ways);
103 ways = check_pow2 (ways, "WAYS", cache_name, sd);
120 cache->ways = ways;
|
| cache.h | 163 - ways must be a power of 2
167 unsigned configured_ways; /* Number of ways configured in each set. */
169 unsigned ways; /* Number of ways in each set. */ member in struct:__anon1564
181 /* The tags are stored by ways within sets in order to make computations
184 & ((cache)->tag_storage[(set) * (cache)->ways + (way)]) \
194 ((tag) - (cache)->tag_storage) & ~((cache)->ways - 1) \
199 CACHE_TAG_SET_START ((cache), (tag)) / (cache)->ways \
|
| /src/sys/arch/riscv/sifive/ |
| fu540_ccache.c | 196 uint32_t ways = sc->sc_size / (sc->sc_sets * sc->sc_line_size); local
200 sc->sc_level, sc->sc_size / 1024, sc->sc_line_size, ways,
209 aprint_verbose_dev(self, "No. of ways per bank %4" __PRIuBIT "\n",
|
| /src/usr.sbin/cpuctl/arch/ |
| i386.c | 973 int type, level, ways, linesize, sets; local
1168 ways = __SHIFTOUT(descs[1], CPUID_DATP_WAYS);
1172 = ways * sets; /* entries */
1174 = full ? 0xff : ways;
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_drv.c | 1129 static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 }; local
1133 ways[EDRAM_WAYS_IDX(cap)] *
|
