| /src/external/gpl3/gcc/dist/gcc/config/iq2000/ |
| iq2000.cc | 350 rtx xplus0 = XEXP (xinsn, 0);
355 while (GET_CODE (xplus0) == SUBREG)
356 xplus0 = SUBREG_REG (xplus0);
357 code0 = GET_CODE (xplus0);
364 && iq2000_reg_mode_ok_for_base_p (xplus0, mode, strict))
3272 rtx xplus0 = XEXP (xinsn, 0);
3274 enum rtx_code code0 = GET_CODE (xplus0);
3279 xplus0 = XEXP (xinsn, 1);
3281 code0 = GET_CODE (xplus0);
347 rtx xplus0 = XEXP (xinsn, 0); local
3245 rtx xplus0 = XEXP (xinsn, 0); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/iq2000/ |
| iq2000.cc | 351 rtx xplus0 = XEXP (xinsn, 0);
356 while (GET_CODE (xplus0) == SUBREG)
357 xplus0 = SUBREG_REG (xplus0);
358 code0 = GET_CODE (xplus0);
365 && iq2000_reg_mode_ok_for_base_p (xplus0, mode, strict))
3275 rtx xplus0 = XEXP (xinsn, 0);
3277 enum rtx_code code0 = GET_CODE (xplus0);
3282 xplus0 = XEXP (xinsn, 1);
3284 code0 = GET_CODE (xplus0);
348 rtx xplus0 = XEXP (xinsn, 0); local
3248 rtx xplus0 = XEXP (xinsn, 0); local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/microblaze/ |
| microblaze.cc | 736 rtx xplus0; local
760 xplus0 = XEXP (x, 0);
763 if (microblaze_valid_base_register_p (xplus0, mode, strict))
766 info->regA = xplus0;
1015 rtx xplus0 = XEXP (xinsn, 0); local
1017 enum rtx_code code0 = GET_CODE (xplus0);
1022 xplus0 = XEXP (xinsn, 1);
1024 code0 = GET_CODE (xplus0);
1028 if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)
1037 gen_rtx_PLUS (Pmode, xplus0, int_reg)))
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/xtensa/ |
| xtensa.cc | 2345 rtx xplus0 = XEXP (addr, 0);
2350 while (GET_CODE (xplus0) == SUBREG)
2351 xplus0 = SUBREG_REG (xplus0);
2352 code0 = GET_CODE (xplus0);
2361 xplus0 = XEXP (addr, 1);
2363 code0 = GET_CODE (xplus0);
2367 if (code0 == REG && BASE_REG_P (xplus0, strict)
2343 rtx xplus0 = XEXP (addr, 0); local
|
| /src/external/gpl3/gcc.old/dist/gcc/config/microblaze/ |
| microblaze.cc | 737 rtx xplus0; local
761 xplus0 = XEXP (x, 0);
764 if (microblaze_valid_base_register_p (xplus0, mode, strict))
767 info->regA = xplus0;
1015 rtx xplus0 = XEXP (xinsn, 0); local
1017 enum rtx_code code0 = GET_CODE (xplus0);
1022 xplus0 = XEXP (xinsn, 1);
1024 code0 = GET_CODE (xplus0);
1028 if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)
1037 gen_rtx_PLUS (Pmode, xplus0, int_reg)))
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/xtensa/ |
| xtensa.cc | 1871 rtx xplus0 = XEXP (addr, 0);
1876 while (GET_CODE (xplus0) == SUBREG)
1877 xplus0 = SUBREG_REG (xplus0);
1878 code0 = GET_CODE (xplus0);
1887 xplus0 = XEXP (addr, 1);
1889 code0 = GET_CODE (xplus0);
1893 if (code0 == REG && BASE_REG_P (xplus0, strict)
1869 rtx xplus0 = XEXP (addr, 0); local
|
