Searched hist:a4 (Results 1 - 25 of 34) sorted by relevance
| /src/sys/dev/ic/ | ||
| H A D | upcreg.h | 1.2 Wed Aug 16 23:56:12 GMT 2000 bjh21 branches: 1.2.2; Basic driver for CHIPS 82C710 Universal Peripheral Controller and friends, as used on later arm26 system (A5000, A4, A3010, A3020, A4000). What we have got: ... upc0 at iobus0 base 0x010000: config state bb 87 1c 00 00 fdc at upc0 offset 0x3f4 not configured wdc0 at upc0 offset 0x1f0 lpt0 at upc0 offset 0x278 com0 at upc0 offset 0x3f8: ns8250 or ns16450, no fifo ... What we haven't got: - FDC support (found, but not configured). - Clearing lpt interrupts on arm26 systems (needs help from IOEB). - A upc(4) manual page. - More than minimal testing (my A3020s don't have root devices). - A proper probe routine (arm26 can't use one anyway). 1.1 Tue Aug 08 22:14:53 GMT 2000 bjh21 Register definitions for the C&T 82C710, 82C711 and 82C721, as used in the Acorn A5000, A4, A4000, A3010 and A3020. |
| H A D | upcvar.h | 1.1 Wed Aug 16 23:56:12 GMT 2000 bjh21 branches: 1.1.2; Basic driver for CHIPS 82C710 Universal Peripheral Controller and friends, as used on later arm26 system (A5000, A4, A3010, A3020, A4000). What we have got: ... upc0 at iobus0 base 0x010000: config state bb 87 1c 00 00 fdc at upc0 offset 0x3f4 not configured wdc0 at upc0 offset 0x1f0 lpt0 at upc0 offset 0x278 com0 at upc0 offset 0x3f8: ns8250 or ns16450, no fifo ... What we haven't got: - FDC support (found, but not configured). - Clearing lpt interrupts on arm26 systems (needs help from IOEB). - A upc(4) manual page. - More than minimal testing (my A3020s don't have root devices). - A proper probe routine (arm26 can't use one anyway). |
| H A D | i82557var.h | 1.27 Fri Apr 05 19:51:05 GMT 2002 thorpej Add support for the "CPUSaver" receive interrupt mitigating microcode on the following PRO/100 chips: * i82558 step A4 * i82558 step B0 * i82559 step A0 * i82559S step A * i82550 * i82550 step C The interrupt delay is configurable on all microcodable chips. The maximum "bundle" size (packet count) is configurable on all but the i82558. The microcode is enabled by setting IFF_LINK0 on the interface. Derived from code in FreeBSD. |
| /src/sys/dev/usb/ | ||
| H A D | ugraphire_rdesc.h | 1.10 Sat Sep 02 04:35:51 GMT 2017 ryoon Support some Wacom pen tablets: * Graphire (pen) * Graphire2 (pen) * Intuos2 A4 (pen) * Intuos Art (pen, no finger touch) Remove report descriptor override workaround for Graphire and Graphire2. |
| H A D | uvscom.c | 1.14 Wed Feb 16 07:52:47 GMT 2005 martin Add SUNTAC U-Cable type A4 support, from yamajun at ofug dot net, in PR kern/29397. |
| /src/sys/arch/riscv/riscv/ | ||
| H A D | db_interface.c | 1.1 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| H A D | db_trace.c | 1.3 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| H A D | db_machdep.c | 1.9 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| H A D | trap.c | 1.18 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| H A D | locore.S | 1.26 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| /src/sys/arch/mips/include/ | ||
| H A D | regdef.h | 1.10 Mon Nov 04 03:38:32 GMT 2002 thorpej branches: 1.10.6; Add SGI-compatible ta0-ta3 register names. These allow one to write asm code which can be built easily in old-ABI and new-ABI environemnts. In old-ABI, they map to t4-t7, and in new-ABI, they map to a4-a7. This means that t0-t3,ta0-ta3,t8,t9 are available in both ABIs. Because ta0-ta3 overlap with arg regs (albeit arg slots which are usually unused), they should be used only if t0-t3,t8,t9 isn't enough. |
| /src/sys/arch/riscv/conf/ | ||
| H A D | files.riscv | 1.10 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| H A D | GENERIC | 1.15 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| /src/sys/arch/riscv/include/ | ||
| H A D | db_machdep.h | 1.6 Tue Sep 27 08:18:21 GMT 2022 skrll Basic ddb and backtrace support. [ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564 [ 1.0000000] cpu0: Begin traceback... [ 1.0000000] trace fp ffffffc000801dd0 [ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98 [ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984 [ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430 [ 1.0000000] cpu0: End traceback... [ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0): [ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0 [ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80 [ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8 [ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8 [ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658 [ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1 [ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75 [ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1 [ 1.0000000] kernel: breakpoint Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak db> |
| /src/distrib/macppc/liveimage/ | ||
| H A D | Makefile | 1.1 Sun Feb 02 10:35:56 GMT 2025 tsutsui Add "build.sh live-image" support for macppc. Confirmed on qemu-9.2.0. --- qemu-system-ppc -m 256 -machine mac99 -cpu g3 \ -drive file=NetBSD-10.99.12-macppc-live.img,media=disk,format=raw,if=none,id=disk0 \ -device ide-hd,bus=ide.0,drive=disk0 \ -netdev user,id=net0 -device e1000,netdev=net0 \ -nographic >> ============================================================= >> OpenBIOS 1.1 [Sep 24 2024 19:56] >> Configuration device id QEMU version 1 machine id 1 >> CPUs: 1 >> Memory: 256M >> UUID: 00000000-0000-0000-0000-000000000000 >> CPU type PowerPC,750 milliseconds isn't unique. Welcome to OpenBIOS v1.1 built on Sep 24 2024 19:56 Trying hd:,\\:tbxi... Trying hd:,\ppc\bootinfo.txt... Trying hd:,%BOOT... >> Not a bootable ELF image >> switching to new context: OF_open bootpath=/pci@f2000000/mac-io@c/ata-3@20000/disk@0 read stage 2 blocks: 01234. done! starting stage 2... >> NetBSD/macppc OpenFirmware Boot, Revision 1.15 (Sun Feb 2 06:06:05 UTC 2025) >> Open Firmware version 3.x >> Open Firmware running in virtual-mode. 11891244+164812 [489184+466096]=0xc68ee8 start=0x100000 [ 1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, [ 1.0000000] 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, [ 1.0000000] 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023, [ 1.0000000] 2024, 2025 [ 1.0000000] The NetBSD Foundation, Inc. All rights reserved. [ 1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993 [ 1.0000000] The Regents of the University of California. All rights reserved. [ 1.0000000] NetBSD 10.99.12 (GENERIC) #0: Sun Feb 2 06:28:31 UTC 2025 [ 1.0000000] runner@fv-az1670-954:/home/runner/work/netbsd-src/netbsd-src/sys/arch/macppc/compile/obj.macppc/GENERIC [ 1.0000000] total memory = 256 MB [ 1.0000000] avail memory = 225 MB [ 1.0000000] found openpic PIC at 80040000 [ 1.0000000] OpenPIC Version 1.2: Supports 1 CPUs and 64 interrupt sources. [ 1.0000000] bootpath: /pci@f2000000/mac-io@c/ata-3@20000/disk@0:/netbsd [ 1.0000000] mainbus0 (root) [ 1.0000000] cpu0 at mainbus0: 750 (Revision 3.1), ID 0 (primary) [ 1.0000000] cpu0: HID0 0x805000a4<EMCP,NAP,DPM,SGE,BTIC,BHT>, powersave: 1 [ 1.0000000] cpu0: 0.00 MHz L2 cache present but not enabled : [ 13.8062284] boot device: wd0 [ 13.8062284] root on wd0a dumps on wd0b [ 13.8212139] root file system type: ffs [ 13.8212139] entropy: best effort [ 13.8212139] kern.module.path=/stand/macppc/10.99.12/modules Sun Feb 2 10:28:53 UTC 2025 Starting root file system check: /dev/rwd0a: file system is clean; not checking : Sun Feb 2 10:29:18 UTC 2025 Feb 2 10:29:19 getty[1181]: /dev/ttyE1: Device not configured NetBSD/macppc (Amnesiac) (ttyZ0) Feb 2 10:29:19 getty[1275]: /dev/ttyE3: Device not configured login: Feb 2 10:29:19 getty[1055]: /dev/ttyE0: Device not configured Feb 2 10:29:19 getty[1023]: /dev/ttyE2: Device not configured --- Note -cpu g4 (default for -machine mac99) triggers qemu assertion: --- : Starting syslogd. qemu: fatal: Raised an exception without defined vector 94 NIP fdb4d560 LR fdb4dd40 CTR fd61a308 XER 20000000 CPU#0 MSR 0200d032 HID0 809400a4 HF 02004012 iidx 0 didx 0 : --- |
| /src/distrib/macppc/liveimage/emuimage/ | ||
| H A D | Makefile | 1.1 Sun Feb 02 10:35:56 GMT 2025 tsutsui Add "build.sh live-image" support for macppc. Confirmed on qemu-9.2.0. --- qemu-system-ppc -m 256 -machine mac99 -cpu g3 \ -drive file=NetBSD-10.99.12-macppc-live.img,media=disk,format=raw,if=none,id=disk0 \ -device ide-hd,bus=ide.0,drive=disk0 \ -netdev user,id=net0 -device e1000,netdev=net0 \ -nographic >> ============================================================= >> OpenBIOS 1.1 [Sep 24 2024 19:56] >> Configuration device id QEMU version 1 machine id 1 >> CPUs: 1 >> Memory: 256M >> UUID: 00000000-0000-0000-0000-000000000000 >> CPU type PowerPC,750 milliseconds isn't unique. Welcome to OpenBIOS v1.1 built on Sep 24 2024 19:56 Trying hd:,\\:tbxi... Trying hd:,\ppc\bootinfo.txt... Trying hd:,%BOOT... >> Not a bootable ELF image >> switching to new context: OF_open bootpath=/pci@f2000000/mac-io@c/ata-3@20000/disk@0 read stage 2 blocks: 01234. done! starting stage 2... >> NetBSD/macppc OpenFirmware Boot, Revision 1.15 (Sun Feb 2 06:06:05 UTC 2025) >> Open Firmware version 3.x >> Open Firmware running in virtual-mode. 11891244+164812 [489184+466096]=0xc68ee8 start=0x100000 [ 1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, [ 1.0000000] 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, [ 1.0000000] 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023, [ 1.0000000] 2024, 2025 [ 1.0000000] The NetBSD Foundation, Inc. All rights reserved. [ 1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993 [ 1.0000000] The Regents of the University of California. All rights reserved. [ 1.0000000] NetBSD 10.99.12 (GENERIC) #0: Sun Feb 2 06:28:31 UTC 2025 [ 1.0000000] runner@fv-az1670-954:/home/runner/work/netbsd-src/netbsd-src/sys/arch/macppc/compile/obj.macppc/GENERIC [ 1.0000000] total memory = 256 MB [ 1.0000000] avail memory = 225 MB [ 1.0000000] found openpic PIC at 80040000 [ 1.0000000] OpenPIC Version 1.2: Supports 1 CPUs and 64 interrupt sources. [ 1.0000000] bootpath: /pci@f2000000/mac-io@c/ata-3@20000/disk@0:/netbsd [ 1.0000000] mainbus0 (root) [ 1.0000000] cpu0 at mainbus0: 750 (Revision 3.1), ID 0 (primary) [ 1.0000000] cpu0: HID0 0x805000a4<EMCP,NAP,DPM,SGE,BTIC,BHT>, powersave: 1 [ 1.0000000] cpu0: 0.00 MHz L2 cache present but not enabled : [ 13.8062284] boot device: wd0 [ 13.8062284] root on wd0a dumps on wd0b [ 13.8212139] root file system type: ffs [ 13.8212139] entropy: best effort [ 13.8212139] kern.module.path=/stand/macppc/10.99.12/modules Sun Feb 2 10:28:53 UTC 2025 Starting root file system check: /dev/rwd0a: file system is clean; not checking : Sun Feb 2 10:29:18 UTC 2025 Feb 2 10:29:19 getty[1181]: /dev/ttyE1: Device not configured NetBSD/macppc (Amnesiac) (ttyZ0) Feb 2 10:29:19 getty[1275]: /dev/ttyE3: Device not configured login: Feb 2 10:29:19 getty[1055]: /dev/ttyE0: Device not configured Feb 2 10:29:19 getty[1023]: /dev/ttyE2: Device not configured --- Note -cpu g4 (default for -machine mac99) triggers qemu assertion: --- : Starting syslogd. qemu: fatal: Raised an exception without defined vector 94 NIP fdb4d560 LR fdb4dd40 CTR fd61a308 XER 20000000 CPU#0 MSR 0200d032 HID0 809400a4 HF 02004012 iidx 0 didx 0 : --- |
| /src/sys/arch/cesfic/cesfic/ | ||
| H A D | locore.s | 1.51 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.51 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.51 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.51 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
| /src/distrib/macppc/ | ||
| H A D | Makefile | 1.20 Sun Feb 02 10:35:56 GMT 2025 tsutsui Add "build.sh live-image" support for macppc. Confirmed on qemu-9.2.0. --- qemu-system-ppc -m 256 -machine mac99 -cpu g3 \ -drive file=NetBSD-10.99.12-macppc-live.img,media=disk,format=raw,if=none,id=disk0 \ -device ide-hd,bus=ide.0,drive=disk0 \ -netdev user,id=net0 -device e1000,netdev=net0 \ -nographic >> ============================================================= >> OpenBIOS 1.1 [Sep 24 2024 19:56] >> Configuration device id QEMU version 1 machine id 1 >> CPUs: 1 >> Memory: 256M >> UUID: 00000000-0000-0000-0000-000000000000 >> CPU type PowerPC,750 milliseconds isn't unique. Welcome to OpenBIOS v1.1 built on Sep 24 2024 19:56 Trying hd:,\\:tbxi... Trying hd:,\ppc\bootinfo.txt... Trying hd:,%BOOT... >> Not a bootable ELF image >> switching to new context: OF_open bootpath=/pci@f2000000/mac-io@c/ata-3@20000/disk@0 read stage 2 blocks: 01234. done! starting stage 2... >> NetBSD/macppc OpenFirmware Boot, Revision 1.15 (Sun Feb 2 06:06:05 UTC 2025) >> Open Firmware version 3.x >> Open Firmware running in virtual-mode. 11891244+164812 [489184+466096]=0xc68ee8 start=0x100000 [ 1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, [ 1.0000000] 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, [ 1.0000000] 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023, [ 1.0000000] 2024, 2025 [ 1.0000000] The NetBSD Foundation, Inc. All rights reserved. [ 1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993 [ 1.0000000] The Regents of the University of California. All rights reserved. [ 1.0000000] NetBSD 10.99.12 (GENERIC) #0: Sun Feb 2 06:28:31 UTC 2025 [ 1.0000000] runner@fv-az1670-954:/home/runner/work/netbsd-src/netbsd-src/sys/arch/macppc/compile/obj.macppc/GENERIC [ 1.0000000] total memory = 256 MB [ 1.0000000] avail memory = 225 MB [ 1.0000000] found openpic PIC at 80040000 [ 1.0000000] OpenPIC Version 1.2: Supports 1 CPUs and 64 interrupt sources. [ 1.0000000] bootpath: /pci@f2000000/mac-io@c/ata-3@20000/disk@0:/netbsd [ 1.0000000] mainbus0 (root) [ 1.0000000] cpu0 at mainbus0: 750 (Revision 3.1), ID 0 (primary) [ 1.0000000] cpu0: HID0 0x805000a4<EMCP,NAP,DPM,SGE,BTIC,BHT>, powersave: 1 [ 1.0000000] cpu0: 0.00 MHz L2 cache present but not enabled : [ 13.8062284] boot device: wd0 [ 13.8062284] root on wd0a dumps on wd0b [ 13.8212139] root file system type: ffs [ 13.8212139] entropy: best effort [ 13.8212139] kern.module.path=/stand/macppc/10.99.12/modules Sun Feb 2 10:28:53 UTC 2025 Starting root file system check: /dev/rwd0a: file system is clean; not checking : Sun Feb 2 10:29:18 UTC 2025 Feb 2 10:29:19 getty[1181]: /dev/ttyE1: Device not configured NetBSD/macppc (Amnesiac) (ttyZ0) Feb 2 10:29:19 getty[1275]: /dev/ttyE3: Device not configured login: Feb 2 10:29:19 getty[1055]: /dev/ttyE0: Device not configured Feb 2 10:29:19 getty[1023]: /dev/ttyE2: Device not configured --- Note -cpu g4 (default for -machine mac99) triggers qemu assertion: --- : Starting syslogd. qemu: fatal: Raised an exception without defined vector 94 NIP fdb4d560 LR fdb4dd40 CTR fd61a308 XER 20000000 CPU#0 MSR 0200d032 HID0 809400a4 HF 02004012 iidx 0 didx 0 : --- |
| /src/sys/arch/luna68k/luna68k/ | ||
| H A D | locore.s | 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
| /src/sys/arch/news68k/news68k/ | ||
| H A D | locore.s | 1.95 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.95 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
| /src/sys/arch/next68k/next68k/ | ||
| H A D | locore.s | 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.93 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
| /src/sbin/ifconfig/ | ||
| H A D | ifconfig.c | 1.215 Sat Apr 04 17:10:19 GMT 2009 plunky Because the IFF_NOARP flag is a negative option it needs to be negated when being applied from the "arp" option which itself is positive. problem demonstrated by # ifconfig tap3 create # ifconfig tap3 tap3: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 arp # ifconfig tap3 tap3: flags=8882<BROADCAST,NOARP,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 -arp # ifconfig tap3 tap3: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 destroy # 1.215 Sat Apr 04 17:10:19 GMT 2009 plunky Because the IFF_NOARP flag is a negative option it needs to be negated when being applied from the "arp" option which itself is positive. problem demonstrated by # ifconfig tap3 create # ifconfig tap3 tap3: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 arp # ifconfig tap3 tap3: flags=8882<BROADCAST,NOARP,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 -arp # ifconfig tap3 tap3: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 destroy # 1.215 Sat Apr 04 17:10:19 GMT 2009 plunky Because the IFF_NOARP flag is a negative option it needs to be negated when being applied from the "arp" option which itself is positive. problem demonstrated by # ifconfig tap3 create # ifconfig tap3 tap3: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 arp # ifconfig tap3 tap3: flags=8882<BROADCAST,NOARP,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 -arp # ifconfig tap3 tap3: flags=8802<BROADCAST,SIMPLEX,MULTICAST> mtu 1500 address: f2:0b:a4:7f:44:03 media: Ethernet autoselect # ifconfig tap3 destroy # |
| /src/sys/arch/x68k/x68k/ | ||
| H A D | locore.s | 1.142 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.142 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.142 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.142 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
| /src/sys/arch/mvme68k/mvme68k/ | ||
| H A D | locore.s | 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.146 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
| /src/sys/arch/hp300/hp300/ | ||
| H A D | locore.s | 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. 1.194 Wed Nov 26 08:51:24 GMT 2025 tsutsui Fix CCR use in locore esym zero tests missed in recent m68k cleanup. The esym value in locore was changed to be loaded into an address register (%a4), but on m68k the MOVEA instruction does not update the condition codes. The subsequent `jne LstartX` therefore relied on stale CCR flags rather than testing whether esym was zero. Add an explicit `tstl %a4` so that the Z flag is updated from the esym value before branching, ensuring the correct end-of-kernel address and nextpa are computed. |
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