1 /* $NetBSD: if_an_pci.c,v 1.38 2022/09/25 17:52:25 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Atsushi Onoe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * PCI bus front-end for the Aironet PC4500/PC4800 Wireless LAN Adapter. 34 * Unlike WaveLAN, this adapter attached as PCI device using a PLX 9050 35 * PCI to "dumb bus" bridge chip. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_an_pci.c,v 1.38 2022/09/25 17:52:25 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/kernel.h> 45 #include <sys/socket.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #include <sys/device.h> 49 #include <sys/callout.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <net80211/ieee80211_netbsd.h> 59 #include <net80211/ieee80211_var.h> 60 61 #include <sys/bus.h> 62 #include <sys/intr.h> 63 64 #include <dev/ic/anreg.h> 65 #include <dev/ic/anvar.h> 66 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcidevs.h> 70 71 #define AN_PCI_PLX_IOBA 0x14 /* i/o base for PLX chip */ 72 #define AN_PCI_IOBA PCI_BAR(2) /* i/o base */ 73 74 struct an_pci_softc { 75 struct an_softc sc_an; /* real "an" softc */ 76 pci_chipset_tag_t sc_pct; 77 pcitag_t sc_pcitag; 78 79 /* PCI-specific goo. */ 80 void *sc_ih; /* interrupt handle */ 81 }; 82 83 static int an_pci_match(device_t, cfdata_t, void *); 84 static void an_pci_attach(device_t, device_t, void *); 85 86 CFATTACH_DECL_NEW(an_pci, sizeof(struct an_pci_softc), 87 an_pci_match, an_pci_attach, NULL, NULL); 88 89 static const struct an_pci_product { 90 u_int32_t app_vendor; /* PCI vendor ID */ 91 u_int32_t app_product; /* PCI product ID */ 92 } an_pci_products[] = { 93 { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4xxx }, 94 { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4500 }, 95 { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4800 }, 96 { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PCI350 }, 97 { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_MPI350 }, 98 { 0, 0 } 99 }; 100 101 static int 102 an_pci_match(device_t parent, cfdata_t match, void *aux) 103 { 104 struct pci_attach_args *pa = aux; 105 const struct an_pci_product *app; 106 107 for (app = an_pci_products; app->app_vendor != 0; app++) { 108 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 109 PCI_PRODUCT(pa->pa_id) == app->app_product) 110 return 1; 111 } 112 return 0; 113 } 114 115 static void 116 an_pci_attach(device_t parent, device_t self, void *aux) 117 { 118 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 119 struct an_pci_softc *psc = device_private(self); 120 struct an_softc *sc = &psc->sc_an; 121 char const *intrstr; 122 pci_intr_handle_t ih; 123 bus_size_t iosize; 124 u_int32_t csr; 125 char intrbuf[PCI_INTRSTR_LEN]; 126 127 sc->sc_dev = self; 128 psc->sc_pct = pa->pa_pc; 129 psc->sc_pcitag = pa->pa_tag; 130 131 pci_aprint_devinfo(pa, "802.11 controller"); 132 133 /* Map I/O registers */ 134 if (pci_mapreg_map(pa, AN_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0, 135 &sc->sc_iot, &sc->sc_ioh, NULL, &iosize) != 0) { 136 aprint_error_dev(self, "unable to map registers\n"); 137 return; 138 } 139 140 /* Enable the device. */ 141 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 142 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 143 csr | PCI_COMMAND_MASTER_ENABLE); 144 145 /* Map and establish the interrupt. */ 146 if (pci_intr_map(pa, &ih)) { 147 aprint_error_dev(self, "unable to map interrupt\n"); 148 return; 149 } 150 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 151 psc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_NET, an_intr, 152 sc, device_xname(self)); 153 if (psc->sc_ih == NULL) { 154 aprint_error_dev(self, "unable to establish interrupt"); 155 if (intrstr != NULL) 156 aprint_error(" at %s", intrstr); 157 aprint_error("\n"); 158 return; 159 } 160 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 161 sc->sc_enabled = 1; 162 163 if (an_attach(sc) != 0) { 164 aprint_error_dev(self, "failed to attach controller\n"); 165 pci_intr_disestablish(pa->pa_pc, psc->sc_ih); 166 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 167 } 168 169 if (pmf_device_register(self, NULL, NULL)) 170 pmf_class_network_register(self, &sc->sc_if); 171 else 172 aprint_error_dev(self, "couldn't establish power handler\n"); 173 } 174
Indexes created Sun Oct 25 00:26:45 UTC 2026