1 /* $NetBSD: osiop_pcctwo.c,v 1.16 2026/04/24 12:33:41 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Front-end attachment code for the ncr53c710 SCSI controller 34 * on mvme68k/mvme88k boards. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: osiop_pcctwo.c,v 1.16 2026/04/24 12:33:41 thorpej Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 45 #include <dev/scsipi/scsi_all.h> 46 #include <dev/scsipi/scsipi_all.h> 47 #include <dev/scsipi/scsiconf.h> 48 49 #include <sys/cpu.h> 50 #include <sys/bus.h> 51 #include <machine/autoconf.h> 52 53 #include <m68k/m68k.h> 54 55 #include <dev/ic/osiopreg.h> 56 #include <dev/ic/osiopvar.h> 57 58 #include <dev/mvme/pcctworeg.h> 59 #include <dev/mvme/pcctwovar.h> 60 61 #include "ioconf.h" 62 63 int osiop_pcctwo_match(device_t, cfdata_t, void *); 64 void osiop_pcctwo_attach(device_t, device_t, void *); 65 66 struct osiop_pcctwo_softc { 67 struct osiop_softc sc_osiop; 68 struct evcnt sc_evcnt; 69 }; 70 71 CFATTACH_DECL_NEW(osiop_pcctwo, sizeof(struct osiop_pcctwo_softc), 72 osiop_pcctwo_match, osiop_pcctwo_attach, NULL, NULL); 73 74 static int osiop_pcctwo_intr(void *); 75 76 /* ARGSUSED */ 77 int 78 osiop_pcctwo_match(device_t parent, cfdata_t cf, void *args) 79 { 80 struct pcctwo_attach_args *pa; 81 bus_space_handle_t bsh; 82 int rv; 83 84 pa = args; 85 86 if (strcmp(pa->pa_name, osiop_cd.cd_name)) 87 return (0); 88 89 /* 90 * See if the SCSI controller is responding. 91 */ 92 if (bus_space_map(pa->pa_bust, pa->pa_offset, OSIOP_NREGS, 0, &bsh)) 93 return (0); 94 rv = bus_space_peek_1(pa->pa_bust, bsh, OSIOP_CTEST8, NULL); 95 bus_space_unmap(pa->pa_bust, bsh, OSIOP_NREGS); 96 if (rv) 97 return (0); 98 99 pa->pa_ipl = cf->pcctwocf_ipl; 100 101 return (1); 102 } 103 104 /* ARGSUSED */ 105 void 106 osiop_pcctwo_attach(device_t parent, device_t self, void *aux) 107 { 108 struct pcctwo_attach_args *pa; 109 struct osiop_pcctwo_softc *sc; 110 int clk, ctest7; 111 112 sc = device_private(self); 113 pa = aux; 114 115 /* 116 * On the '17x the siop's clock is the same as the CPU clock. 117 * On the other boards, the siop runs at twice the CPU clock. 118 * Also, the 17x cannot do proper bus-snooping (the 68060 is 119 * lame in this repspect) so don't enable it on that board. 120 */ 121 #ifdef MVME68K 122 if (machineid == MVME_172 || machineid == MVME_177) { 123 clk = cpuspeed_khz / 1000; 124 ctest7 = 0; 125 } else { 126 clk = (cpuspeed_khz / 1000) * 2; 127 ctest7 = OSIOP_CTEST7_SC0; 128 } 129 #else 130 #error Set up siop clock speed for mvme187 131 #endif 132 133 sc->sc_osiop.sc_dev = self; 134 sc->sc_osiop.sc_bst = pa->pa_bust; 135 sc->sc_osiop.sc_dmat = pa->pa_dmat; 136 (void) bus_space_map(sc->sc_osiop.sc_bst, pa->pa_offset, OSIOP_NREGS, 137 0, &sc->sc_osiop.sc_reg); 138 139 sc->sc_osiop.sc_clock_freq = clk; 140 sc->sc_osiop.sc_ctest7 = ctest7 | OSIOP_CTEST7_TT1; 141 sc->sc_osiop.sc_dcntl = OSIOP_DCNTL_EA; 142 sc->sc_osiop.sc_id = 7; /* XXX: Could use NVRAM setting */ 143 144 /* Attach main MI driver */ 145 osiop_attach(&sc->sc_osiop); 146 147 /* Register the event counter */ 148 evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR, 149 pcctwointr_evcnt(pa->pa_ipl), "disk", 150 device_xname(sc->sc_osiop.sc_dev)); 151 152 /* Hook the chip's interrupt */ 153 pcctwointr_establish(PCCTWOV_SCSI, osiop_pcctwo_intr, pa->pa_ipl, sc, 154 &sc->sc_evcnt); 155 } 156 157 static int 158 osiop_pcctwo_intr(void *arg) 159 { 160 struct osiop_pcctwo_softc *sc = arg; 161 u_char istat; 162 163 /* 164 * Catch any errors which can happen when the SIOP is 165 * local bus master... 166 */ 167 istat = pcc2_reg_read(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS); 168 if ((istat & PCCTWO_ERR_SR_MASK) != 0) { 169 printf("%s: Local bus error: 0x%02x\n", 170 device_xname(sc->sc_osiop.sc_dev), istat); 171 istat |= PCCTWO_ERR_SR_SCLR; 172 pcc2_reg_write(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS, istat); 173 } 174 175 /* This is potentially nasty, since the IRQ is level triggered... */ 176 if (sc->sc_osiop.sc_flags & OSIOP_INTSOFF) 177 return (0); 178 179 istat = osiop_read_1(&sc->sc_osiop, OSIOP_ISTAT); 180 181 if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0) 182 return (0); 183 184 /* Save interrupt details for the back-end interrupt handler */ 185 sc->sc_osiop.sc_sstat0 = osiop_read_1(&sc->sc_osiop, OSIOP_SSTAT0); 186 sc->sc_osiop.sc_istat = istat; 187 sc->sc_osiop.sc_dstat = osiop_read_1(&sc->sc_osiop, OSIOP_DSTAT); 188 189 /* Deal with the interrupt */ 190 osiop_intr(&sc->sc_osiop); 191 192 return (1); 193 } 194
Indexes created Sun Oct 25 00:26:45 UTC 2026