1 /*- 2 * Copyright (c) 2021 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Nick Hudson 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include "opt_cputypes.h" 31 #include "opt_multiprocessor.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(1, "$NetBSD: aarch64_tlb.c,v 1.3 2026/04/19 15:09:49 skrll Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/types.h> 38 39 #include <uvm/uvm.h> 40 41 #include <arm/cpufunc.h> 42 43 #include <aarch64/armreg.h> 44 45 tlb_asid_t 46 tlb_get_asid(void) 47 { 48 49 return (reg_tcr_el1_read() & TCR_EPD0) != 0 ? 50 KERNEL_PID :__SHIFTOUT(reg_ttbr0_el1_read(), TTBR_ASID); 51 } 52 53 #if 0 54 void 55 tlb_set_asid(tlb_asid_t asid, pmap_t pm) 56 { 57 const uint64_t ttbr = 58 __SHIFTIN(asid, TTBR_ASID) | 59 __SHIFTIN(pmap_l0pa(pm), TTBR_BADDR); 60 61 cpu_set_ttbr0(ttbr); 62 } 63 #endif 64 65 void 66 tlb_invalidate_all(void) 67 { 68 69 aarch64_tlbi_all(); 70 } 71 72 void 73 tlb_invalidate_globals(void) 74 { 75 tlb_invalidate_all(); 76 } 77 78 void 79 tlb_invalidate_asids(tlb_asid_t lo, tlb_asid_t hi) 80 { 81 for (; lo <= hi; lo++) { 82 aarch64_tlbi_by_asid(lo); 83 } 84 } 85 86 void 87 tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid) 88 { 89 KASSERT((va & PAGE_MASK) == 0); 90 91 aarch64_tlbi_by_asid_va(asid, va); 92 } 93 94 bool 95 tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert_p) 96 { 97 KASSERT((va & PAGE_MASK) == 0); 98 99 tlb_invalidate_addr(va, asid); 100 101 return true; 102 } 103 104 u_int 105 tlb_record_asids(u_long *mapp, tlb_asid_t asid_max) 106 { 107 KASSERT(asid_max == pmap_md_tlb_asid_max()); 108 109 #if DIAGNOSTIC 110 memset(mapp, 0xff, (asid_max + 1) / NBBY); 111 mapp[0] ^= __BITS(0, KERNEL_PID); 112 #endif 113 return asid_max; 114 } 115 116 void 117 tlb_walk(void *ctx, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t)) 118 { 119 120 /* no way to view the TLB */ 121 } 122