Home | History | Annotate | Line # | Download | only in sunxi 
      1 /* $NetBSD: sun9i_a80_usbclk.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 
     31 __KERNEL_RCSID(1, "$NetBSD: sun9i_a80_usbclk.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
     32 
     33 #include <sys/param.h>
     34 #include <sys/bus.h>
     35 #include <sys/device.h>
     36 #include <sys/systm.h>
     37 
     38 #include <dev/fdt/fdtvar.h>
     39 
     40 #include <arm/sunxi/sunxi_ccu.h>
     41 
     42 enum {
     43 	CLK_BUS_HCI0 = 0,
     44 	CLK_USB_OHCI0,
     45 	CLK_BUS_HCI1,
     46 	CLK_BUS_HCI2,
     47 	CLK_USB_OHCI2,
     48 	CLK_USB0_PHY,
     49 	CLK_USB1_HSIC,
     50 	CLK_USB1_PHY,
     51 	CLK_USB2_HSIC,
     52 	CLK_USB2_PHY,
     53 	CLK_USB_HSIC
     54 };
     55 
     56 enum {
     57 	RST_USB0_HCI = 0,
     58 	RST_USB1_HCI,
     59 	RST_USB2_HCI,
     60 	RST_USB0_PHY,
     61 	RST_USB1_HSIC,
     62 	RST_USB1_PHY,
     63 	RST_USB2_HSIC,
     64 	RST_USB2_PHY
     65 };
     66 
     67 #define	HCI_SCR		0x00
     68 #define	HCI_PCR		0x04
     69 
     70 static int sun9i_a80_usbclk_match(device_t, cfdata_t, void *);
     71 static void sun9i_a80_usbclk_attach(device_t, device_t, void *);
     72 
     73 static const struct device_compatible_entry compat_data[] = {
     74 	{ .compat = "allwinner,sun9i-a80-usb-clks" },
     75 	DEVICE_COMPAT_EOL
     76 };
     77 
     78 CFATTACH_DECL_NEW(sunxi_a80_usbclk, sizeof(struct sunxi_ccu_softc),
     79 	sun9i_a80_usbclk_match, sun9i_a80_usbclk_attach, NULL, NULL);
     80 
     81 static struct sunxi_ccu_reset sun9i_a80_usbclk_resets[] = {
     82 	SUNXI_CCU_RESET(RST_USB0_HCI, HCI_SCR, 17),
     83 	SUNXI_CCU_RESET(RST_USB1_HCI, HCI_SCR, 18),
     84 	SUNXI_CCU_RESET(RST_USB2_HCI, HCI_SCR, 19),
     85 	SUNXI_CCU_RESET(RST_USB0_PHY, HCI_PCR, 17),
     86 
     87 	SUNXI_CCU_RESET(RST_USB1_HSIC, HCI_PCR, 18),
     88 	SUNXI_CCU_RESET(RST_USB1_PHY, HCI_PCR, 19),
     89 	SUNXI_CCU_RESET(RST_USB2_HSIC, HCI_PCR, 20),
     90 	SUNXI_CCU_RESET(RST_USB2_PHY, HCI_PCR, 21),
     91 };
     92 
     93 static struct sunxi_ccu_clk sun9i_a80_usbclk_clks[] = {
     94 	SUNXI_CCU_GATE(CLK_BUS_HCI0, "bus-hci0", "bus", HCI_SCR, 1),
     95 	SUNXI_CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "hosc", HCI_SCR, 2),
     96 	SUNXI_CCU_GATE(CLK_BUS_HCI1, "bus-hci1", "bus", HCI_SCR, 3),
     97 	SUNXI_CCU_GATE(CLK_BUS_HCI2, "bus-hci2", "bus", HCI_SCR, 5),
     98 	SUNXI_CCU_GATE(CLK_USB_OHCI2, "usb-ohci2", "hosc", HCI_SCR, 6),
     99 
    100 	SUNXI_CCU_GATE(CLK_USB0_PHY, "usb0-phy", "hosc", HCI_PCR, 1),
    101 	SUNXI_CCU_GATE(CLK_USB1_HSIC, "usb1-hsic", "hosc", HCI_PCR, 2),
    102 	SUNXI_CCU_GATE(CLK_USB1_PHY, "usb1-phy", "hosc", HCI_PCR, 3),
    103 	SUNXI_CCU_GATE(CLK_USB2_HSIC, "usb2-hsic", "hosc", HCI_PCR, 4),
    104 	SUNXI_CCU_GATE(CLK_USB2_PHY, "usb2-phy", "hosc", HCI_PCR, 5),
    105 	SUNXI_CCU_GATE(CLK_USB_HSIC, "usb-hsic", "hosc", HCI_PCR, 10),
    106 };
    107 
    108 static int
    109 sun9i_a80_usbclk_match(device_t parent, cfdata_t cf, void *aux)
    110 {
    111 	struct fdt_attach_args * const faa = aux;
    112 
    113 	return of_compatible_match(faa->faa_phandle, compat_data);
    114 }
    115 
    116 static void
    117 sun9i_a80_usbclk_attach(device_t parent, device_t self, void *aux)
    118 {
    119 	struct sunxi_ccu_softc * const sc = device_private(self);
    120 	struct fdt_attach_args * const faa = aux;
    121 	const int phandle = faa->faa_phandle;
    122 	struct clk *clk;
    123 
    124 	sc->sc_dev = self;
    125 	sc->sc_phandle = faa->faa_phandle;
    126 	sc->sc_bst = faa->faa_bst;
    127 
    128 	sc->sc_resets = sun9i_a80_usbclk_resets;
    129 	sc->sc_nresets = __arraycount(sun9i_a80_usbclk_resets);
    130 
    131 	sc->sc_clks = sun9i_a80_usbclk_clks;
    132 	sc->sc_nclks = __arraycount(sun9i_a80_usbclk_clks);
    133 
    134 	clk = fdtbus_clock_get(phandle, "bus");
    135 	if (clk == NULL || clk_enable(clk) != 0) {
    136 		aprint_error(": couldn't enable clock\n");
    137 		return;
    138 	}
    139 
    140 	if (sunxi_ccu_attach(sc) != 0)
    141 		return;
    142 
    143 	aprint_naive("\n");
    144 	aprint_normal(": A80 USB HCI clocks\n");
    145 
    146 	sunxi_ccu_print(sc);
    147 }
    148