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  /src/external/lgpl3/gmp/dist/mpn/arm/
copyd.asm 44 C * Consider wider unrolling. Analogous 8-way code runs 10% faster on both A9
copyi.asm 44 C * Consider wider unrolling. Analogous 8-way code runs 10% faster on both A9
mod_34lsub1.asm 51 C * Consider loading 6 64-bit aligned registers at a time, to approach 1 c/l.
sec_tabselect.asm 44 C * Consider using special code for small nents, either swapping the inner and
  /src/external/lgpl3/gmp/dist/mpn/arm/v7a/cora17/
mod_34lsub1.asm 51 C * Consider loading 6 64-bit aligned registers at a time, to approach 1 c/l.
  /src/external/lgpl3/gmp/dist/mpn/powerpc64/p7/
copyi.asm 48 C * Consider using 4 pointers, schedule ptr update early wrt use.
  /src/external/lgpl3/gmp/dist/mpn/x86_64/atom/
lshift.asm 46 C * Consider using 4-way unrolling. We reach 4 c/l, but the code is 2.5 times
lshiftc.asm 46 C * Consider using 4-way unrolling. We reach 4.5 c/l, but the code is 2.5
rshift.asm 46 C * Consider using 4-way unrolling. We reach 4 c/l, but the code is 2.5 times
  /src/external/lgpl3/gmp/dist/mpn/arm/v7a/cora15/neon/
aorsorrlshC_n.asm 43 C * Consider using 4-way feed-in code.
  /src/external/lgpl3/gmp/dist/mpn/arm64/
popcount.asm 39 C * Consider greater unrolling.
hamdist.asm 39 C * Consider greater unrolling.
  /src/external/lgpl3/gmp/dist/mpn/x86_64/core2/
popcount.asm 60 C * Consider doing some instruction scheduling.
hamdist.asm 60 C * Consider doing some instruction scheduling.
redc_1.asm 58 C * Consider inlining mpn_add_n.
  /src/external/lgpl3/gmp/dist/mpn/x86_64/coreihwl/
sqr_basecase.asm 60 C * Consider splitting outer loop into 2, one for n = 1 (mod 2) and one for
62 C * Consider splitting outer loop into 4.
  /src/external/lgpl3/gmp/dist/mpn/arm/neon/
lshiftc.asm 59 C * Consider sharing most of the code for lshift and rshift, since the feed-in
lorrshift.asm 59 C * Consider sharing most of the code for lshift and rshift, since the feed-in
  /src/external/lgpl3/gmp/dist/mpn/powerpc32/vmx/
copyd.asm 46 C * Consider using VMX instructions also for head and tail, by using some
copyi.asm 46 C * Consider using VMX instructions also for head and tail, by using some
  /src/external/lgpl3/gmp/dist/mpn/s390_64/
lshift.asm 45 C * Consider using the same feed-in code for 1 <= n <= 3 as for n mod 4,
  /src/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/p9/
sqr_basecase.asm 44 C * Completely separate evn and odd code into two outer loops. Also consider
48 C * Consider getting rid of cy and instead load 3 u limbs, use addc+adde+adde.
49 C * Consider skewing conditional adjustments to allow mask creation with subfe
  /src/external/ibm-public/postfix/dist/conf/
postfix-tls-script 346 Postfix supports ECDSA, but the $openssl command does not. Consider
  /src/external/lgpl3/gmp/dist/mpn/x86/k7/
invert_limb.asm 50 C * These c/l numbers are for a non-PIC build. Consider falling back to using
  /src/external/lgpl3/gmp/dist/mpn/x86_64/coreisbr/
mul_basecase.asm 61 C * Consider replacing the 2-way mul_2 code with 4-way code, for a very slight

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