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  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiSubtarget.cpp 25 void LanaiSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
26 std::string CPUName = std::string(CPU);
33 LanaiSubtarget &LanaiSubtarget::initializeSubtargetDependencies(StringRef CPU,
35 initSubtargetFeatures(CPU, FS);
39 LanaiSubtarget::LanaiSubtarget(const Triple &TargetTriple, StringRef Cpu,
44 : LanaiGenSubtargetInfo(TargetTriple, Cpu, /*TuneCPU*/ Cpu, FeatureString),
45 FrameLowering(initializeSubtargetDependencies(Cpu, FeatureString)),
LanaiTargetMachine.cpp 55 StringRef Cpu, StringRef FeatureString,
60 : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
64 Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
LanaiSubtarget.h 33 LanaiSubtarget(const Triple &TargetTriple, StringRef Cpu,
40 void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
42 LanaiSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
44 void initSubtargetFeatures(StringRef CPU, StringRef FS);
LanaiTargetMachine.h 30 StringRef Cpu, StringRef FeatureString,
  /src/external/cddl/dtracetoolkit/dist/Bin/
dexplorer 208 mkdir Cpu
232 psrinfo -v > Info/psrinfo-v # CPU
240 # Cpu Tests, DTrace
243 dstatus "Interrupts by CPU..."
245 sdt:::interrupt-start { @num[cpu] = count(); }
248 printf("%-16s %16s\n", "CPU", "INTERRUPTS");
251 ' | $clean > Cpu/interrupt_by_cpu
272 ' | $clean > Cpu/interrupt_time
274 dstatus "Dispatcher queue length by CPU..."
279 @length[cpu] = lquantize(this->num, 0, 100, 1)
    [all...]
  /src/external/cddl/dtracetoolkit/dist/
dexplorer 208 mkdir Cpu
232 psrinfo -v > Info/psrinfo-v # CPU
240 # Cpu Tests, DTrace
243 dstatus "Interrupts by CPU..."
245 sdt:::interrupt-start { @num[cpu] = count(); }
248 printf("%-16s %16s\n", "CPU", "INTERRUPTS");
251 ' | $clean > Cpu/interrupt_by_cpu
272 ' | $clean > Cpu/interrupt_time
274 dstatus "Dispatcher queue length by CPU..."
279 @length[cpu] = lquantize(this->num, 0, 100, 1)
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/
EnumTables.h 23 ArrayRef<EnumEntry<uint16_t>> getRegisterNames(CPUType Cpu);
CodeView.h 526 CPURegister(CPUType Cpu, codeview::RegisterId Reg) {
527 this->Cpu = Cpu;
530 CPUType Cpu;
543 RegisterId decodeFramePtrReg(EncodedFramePtrReg EncodedReg, CPUType CPU);
545 EncodedFramePtrReg encodeFramePtrReg(RegisterId Reg, CPUType CPU);
  /src/external/apache2/llvm/dist/llvm/include/llvm/LTO/legacy/
ThinLTOCodeGenerator.h 199 /// CPU to use to initialize the TargetMachine
200 void setCpu(std::string Cpu) { TMBuilder.MCpu = std::move(Cpu); }
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
PerfHelper.cpp 100 const int Cpu = -1; // measure any processor.
104 FileDescriptor = perf_event_open(&AttrCopy, Pid, Cpu, GroupFd, Flags);
  /src/external/apache2/llvm/dist/clang/lib/Driver/ToolChains/
Hexagon.cpp 29 static StringRef getDefaultHvxLength(StringRef Cpu) {
30 return llvm::StringSwitch<StringRef>(Cpu)
50 StringRef Cpu, bool &HasHVX) {
65 HVXFeature = Cpu = A->getValue();
69 HVXFeature = Args.MakeArgString(llvm::Twine("+hvx") + Cpu);
82 // Default hvx-length based on Cpu.
84 HVXLength = getDefaultHvxLength(Cpu);
109 StringRef Cpu(toolchains::HexagonToolChain::GetTargetCPUVersion(Args));
110 // 't' in Cpu denotes tiny-core micro-architecture. For now, the co-processors
112 const bool TinyCore = Cpu.contains('t')
    [all...]
  /src/external/apache2/llvm/dist/llvm/tools/llvm-pdbutil/
MinimalSymbolDumper.cpp 214 static std::string formatMachineType(CPUType Cpu) {
215 switch (Cpu) {
277 return formatUnknownEnum(Cpu);
290 static std::string formatRegisterId(RegisterId Id, CPUType Cpu) {
291 if (Cpu == CPUType::ARMNT) {
302 } else if (Cpu == CPUType::ARM64) {
328 static std::string formatRegisterId(uint16_t Reg16, CPUType Cpu) {
329 return formatRegisterId(RegisterId(Reg16), Cpu);
332 static std::string formatRegisterId(ulittle16_t &Reg16, CPUType Cpu) {
333 return formatRegisterId(uint16_t(Reg16), Cpu);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/CodeView/
EnumTables.cpp 444 ArrayRef<EnumEntry<uint16_t>> getRegisterNames(CPUType Cpu) {
445 if (Cpu == CPUType::ARMNT) {
447 } else if (Cpu == CPUType::ARM64) {
  /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/
PDBExtras.cpp 121 if (CpuReg.Cpu == llvm::codeview::CPUType::ARMNT) {
135 } else if (CpuReg.Cpu == llvm::codeview::CPUType::ARM64) {
  /src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/
CodeViewYAMLSymbols.cpp 142 void ScalarEnumerationTraits<CPUType>::enumeration(IO &io, CPUType &Cpu) {
145 io.enumCase(Cpu, E.Name.str().c_str(), static_cast<CPUType>(E.Value));
  /src/external/gpl3/binutils/dist/opcodes/
i386-gen.c 334 #define BITFIELD(n) { Cpu##n, 0, #n }
891 fail ("%s: %d: invalid combination of CPU identifiers\n",
947 /* Copy the default cpu flags. */
  /src/external/gpl3/binutils.old/dist/opcodes/
i386-gen.c 318 #define BITFIELD(n) { Cpu##n, 0, #n }
871 fail ("%s: %d: invalid combination of CPU identifiers\n",
927 /* Copy the default cpu flags. */
  /src/external/gpl3/gdb.old/dist/opcodes/
i386-gen.c 300 #define BITFIELD(n) { Cpu##n, 0, #n }
841 fail ("%s: %d: invalid combination of CPU identifiers\n",
897 /* Copy the default cpu flags. */
  /src/external/gpl3/gdb/dist/opcodes/
i386-gen.c 318 #define BITFIELD(n) { Cpu##n, 0, #n }
871 fail ("%s: %d: invalid combination of CPU identifiers\n",
927 /* Copy the default cpu flags. */

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