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    Searched refs:Ed (Results 1 - 17 of 17) sorted by relevancy

  /src/external/bsd/tmux/dist/
mdoc2man.awk 97 } else if(match(words[w],"^Ed$")) {
  /src/external/bsd/openpam/dist/misc/
gendoc.pl 241 $man .= ".Ed\n";
258 $man .= ".Ed\n";
279 $man .= ".Ed\n";
317 $man .= ".Ed\n";
  /src/external/bsd/file/dist/tests/
matilde.arm.testfile 128 ��豼{��`�s�2c�<sv�`���5$㢥�d��p����`1�_i�<�u5�~D�� ׯM-�➩S#m�m�jl�g?`<im0a(��k���1����2Q3�����Ɖа<Ti�J��Z|I�Յ�}k0��)�GhT�F�<V�0�kF !N�g����Z��-1��<Bi>�K�ai�Zb��]ޛ ����[�Ĝ{��<:w��`@��ؠ7k���ᡳd�:�[ @<0UrBd�ɯP ��.=��?� �E;q��<*���c�a)�&�(Sz�1���Q��?u2 <>\��0��ÿ��"�����p�;���x`<(�_�6PAm�T(U���/��Tf����<2g�Ed\Ia<J
  /src/sys/arch/amd64/amd64/
db_disasm.c 116 #define Ed 35 /* address, double size */
712 /*63*/ { "movslq",true, NONE, op2(Ed, R), 0 },/* aka MOVSXD, in 64bit mode */
869 /*ed*/ { "in", false, LONG, op2(DX, A) , 0 },
1359 case Ed:
1375 case Ed:
  /src/external/bsd/ntp/dist/sntp/ag-tpl/0-old/
Mdoc.pm 142 * Provide default macros for Bd/Ed
  /src/share/terminfo/
terminfo 351 clear=\E[H\E[J, ed=\E[J, el=\E[K,
568 cuu1=\E[A, dch1=\E[P, dl1=\E[M$<5*/>, ed=\E[J, el=\E[K,
569 home=\E[H, ht=^I, il1=\E[L$<5*/>, ind=\ED, kbs=^H,
571 kf2=\EOR, kf4=\EOS, khome=\E[H, nel=\r\ED, rc=\E8, ri=\EM,
590 dch1=\E[P, dl1=\E[M, ed=\E[J, el=\E[K, home=\E[H, ht=^I,
833 bel=^G, civis=\Ef, clear=\EE, cnorm=\Ee, cr=\r, cub1=\ED,
835 cuu1=\EA, dl1=\EM, ed=\EJ, el=\EK, el1=\Eo, home=\EH, ht=^I,
836 il1=\EL, ind=\n, is2=\Ev\Eq\Ee, kLFT=\Ed, kRIT=\Ec, kbs=^H,
837 kcub1=\ED, kcud1=\EB, kcuf1=\EC, kcuu1=\EA, kdch1=^?,
854 dl1=\E[M, ed=\E[J, el=\E[K, el1=\E[1K, home=\E[H, ht=^I
    [all...]
  /src/external/gpl3/binutils/dist/opcodes/
i386-dis.c 433 #define Ed { OP_E, d_mode }
3120 { "lwpins", { VexGdq, Ed, Id }, 0 },
3121 { "lwpval", { VexGdq, Ed, Id }, 0 },
5174 { "extractps", { Ed, XM, Ib }, PREFIX_DATA },
7525 { "%XEvextractps", { Ed, XM, Ib }, PREFIX_DATA },
aarch64-tbl.h 3854 SIMD_INSN ("ins", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_HAS_ALIAS),
3855 SIMD_INSN ("mov", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_ALIAS),
3856 SIMD_INSN ("ins", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_HAS_ALIAS),
3857 SIMD_INSN ("mov", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_ALIAS),
7999 Y(SIMD_ELEMENT, reglane, "Ed", 0, F(FLD_Rd), \
  /src/external/gpl3/binutils.old/dist/opcodes/
i386-dis.c 433 #define Ed { OP_E, d_mode }
3111 { "lwpins", { VexGdq, Ed, Id }, 0 },
3112 { "lwpval", { VexGdq, Ed, Id }, 0 },
5135 { "extractps", { Ed, XM, Ib }, PREFIX_DATA },
7486 { "%XEvextractps", { Ed, XM, Ib }, PREFIX_DATA },
aarch64-tbl.h 3634 SIMD_INSN ("ins", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_HAS_ALIAS),
3635 SIMD_INSN ("mov", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_ALIAS),
3636 SIMD_INSN ("ins", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_HAS_ALIAS),
3637 SIMD_INSN ("mov", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_ALIAS),
7550 Y(SIMD_ELEMENT, reglane, "Ed", 0, F(FLD_Rd), \
  /src/external/gpl3/gdb.old/dist/opcodes/
i386-dis.c 434 #define Ed { OP_E, d_mode }
3047 { "lwpins", { VexGdq, Ed, Id }, 0 },
3048 { "lwpval", { VexGdq, Ed, Id }, 0 },
4929 { "extractps", { Ed, XM, Ib }, PREFIX_DATA },
7250 { "%XEvextractps", { Ed, XM, Ib }, PREFIX_DATA },
aarch64-tbl.h 3396 SIMD_INSN ("ins", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_HAS_ALIAS),
3397 SIMD_INSN ("mov", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_ALIAS),
3398 SIMD_INSN ("ins", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_HAS_ALIAS),
3399 SIMD_INSN ("mov", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_ALIAS),
6959 Y(SIMD_ELEMENT, reglane, "Ed", 0, F(FLD_Rd), \
  /src/external/gpl3/gdb/dist/opcodes/
i386-dis.c 433 #define Ed { OP_E, d_mode }
3112 { "lwpins", { VexGdq, Ed, Id }, 0 },
3113 { "lwpval", { VexGdq, Ed, Id }, 0 },
5142 { "extractps", { Ed, XM, Ib }, PREFIX_DATA },
7493 { "%XEvextractps", { Ed, XM, Ib }, PREFIX_DATA },
aarch64-tbl.h 3634 SIMD_INSN ("ins", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_HAS_ALIAS),
3635 SIMD_INSN ("mov", 0x4e001c00, 0xffe0fc00, asimdins, 0, OP2 (Ed, Rn), QL_INS_XR, F_ALIAS),
3636 SIMD_INSN ("ins", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_HAS_ALIAS),
3637 SIMD_INSN ("mov", 0x6e000400, 0xffe08400, asimdins, 0, OP2 (Ed, En), QL_S_2SAME, F_ALIAS),
7550 Y(SIMD_ELEMENT, reglane, "Ed", 0, F(FLD_Rd), \
  /src/crypto/external/apache2/openssl/dist/test/recipes/30-test_evp_data/
evppkey_kas.txt 5953 vlJetaagOxlmVxmpApaG+Ed/tcdp77CCyz8aDHnbVcsmTiESwOd557VY9wBFgWoQ
  /src/crypto/external/bsd/openssl/dist/test/recipes/30-test_evp_data/
evppkey_kas.txt 5953 vlJetaagOxlmVxmpApaG+Ed/tcdp77CCyz8aDHnbVcsmTiESwOd557VY9wBFgWoQ
  /src/crypto/external/bsd/openssl.old/dist/test/recipes/30-test_evp_data/
evppkey.txt 11718 vlJetaagOxlmVxmpApaG+Ed/tcdp77CCyz8aDHnbVcsmTiESwOd557VY9wBFgWoQ

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