| /src/sys/arch/pmax/tc/ |
| tc_3max.c | 51 { KV(KN02_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */
52 { KV(KN02_PHYS_TC_1_START), C(SYS_DEV_OPT1), }, /* 1 - opt slot 1 */
53 { KV(KN02_PHYS_TC_2_START), C(SYS_DEV_OPT2), }, /* 2 - opt slot 2 */
54 { KV(KN02_PHYS_TC_3_START), C(SYS_DEV_BOGUS), }, /* 3 - unused */
55 { KV(KN02_PHYS_TC_4_START), C(SYS_DEV_BOGUS), }, /* 4 - unused */
56 { KV(KN02_PHYS_TC_5_START), C(SYS_DEV_SCSI), }, /* 5 - b`board SCSI */
57 { KV(KN02_PHYS_TC_6_START), C(SYS_DEV_LANCE), }, /* 6 - b`board LANCE */
58 { KV(KN02_PHYS_TC_7_START), C(SYS_DEV_BOGUS), }, /* 7 - system CSRs */
|
| tc_3maxplus.c | 51 { KV(KN03_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */
52 { KV(KN03_PHYS_TC_1_START), C(SYS_DEV_OPT1), }, /* 1 - opt slot 1 */
53 { KV(KN03_PHYS_TC_2_START), C(SYS_DEV_OPT2), }, /* 2 - opt slot 2 */
54 { KV(KN03_PHYS_TC_3_START), C(SYS_DEV_BOGUS), }, /* 3 - IOASIC */
|
| tc_3min.c | 51 { KV(KMIN_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */
52 { KV(KMIN_PHYS_TC_1_START), C(SYS_DEV_OPT1), }, /* 1 - opt slot 1 */
53 { KV(KMIN_PHYS_TC_2_START), C(SYS_DEV_OPT2), }, /* 2 - opt slot 2 */
54 { KV(KMIN_PHYS_TC_3_START), C(SYS_DEV_BOGUS), }, /* 3 - IOASIC */
|
| tc_maxine.c | 53 { KV(XINE_PHYS_TC_0_START), C(SYS_DEV_OPT0), }, /* 0 - opt slot 0 */
54 { KV(XINE_PHYS_TC_1_START), C(SYS_DEV_OPT1), }, /* 1 - opt slot 1 */
55 { KV(XINE_PHYS_CFB_START), C(SYS_DEV_BOGUS), }, /* 2 - unused */
56 { KV(XINE_PHYS_TC_3_START), C(SYS_DEV_BOGUS), }, /* 3 - IOASIC */
|
| /src/sys/arch/alpha/tc/ |
| tc_3000_300.h | 37 #define TC_3000_300_IR KV(0x00000001e0000000) /* Dense */
38 #define TC_3000_300_CSR KV(0x00000001e0000008) /* Dense */
39 #define TC_3000_300_MCR KV(0x00000001e0000010) /* Dense */
40 #define TC_3000_300_LED KV(0x00000001e0000018) /* Dense */
|
| tc_3000_500.h | 40 #define TC_3000_500_IOSLOT KV(0x00000001c2000000) /* Dense */
41 #define TC_3000_500_TCCONFIG KV(0x00000001c2000008) /* Dense */
42 #define TC_3000_500_FADR KV(0x00000001c2000010) /* Dense */
43 #define TC_3000_500_TCEREG KV(0x00000001c2000018) /* Dense */
44 #define TC_3000_500_MEMCONF KV(0x00000001c2200000) /* Dense */
45 #define TC_3000_500_IMR_READ KV(0x00000001c2400000) /* Dense */
46 #define TC_3000_500_IMR_WRITE KV(0x00000001c281fffc) /* Dense */
47 #define TC_3000_500_TCRESET KV(0x00000001c2a00000) /* Dense */
48 #define TC_3000_500_IR KV(0x00000001d4800000) /* Sparse */
49 #define TC_3000_500_IR_CLEAR KV(0x00000001d4c00000) /* Sparse *
[all...] |
| tc_3000_300.c | 58 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x))
66 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000)
69 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */
70 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */
71 { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */
72 { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */
73 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */
74 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */
75 { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */
313 sfb_cnattach(KV(0x1c0000000) + 0x02000000)
[all...] |
| tc_3000_500.c | 58 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x))
61 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */
62 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */
63 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */
64 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */
65 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */
66 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */
67 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */
68 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */
306 sfb_cnattach(KV(0x1e0000000) + 0x02000000)
[all...] |
| /src/sys/arch/pmax/ibus/ |
| ibus_pmax.c | 58 #define KV(x) MIPS_PHYS_TO_KSEG1(x)
62 { "pm", SYS_DEV_BOGUS, KV(KN01_PHYS_FBUF_START), 0 },
63 { "dc", SYS_DEV_SCC0, KV(KN01_SYS_DZ), 0 },
64 { "lance", SYS_DEV_LANCE, KV(KN01_SYS_LANCE), 0 },
65 { "sii", SYS_DEV_SCSI, KV(KN01_SYS_SII), 0 },
66 { "mc146818", SYS_DEV_BOGUS, KV(KN01_SYS_CLOCK), 0 },
72 { "dc", SYS_DEV_SCC0, KV(KN230_SYS_DZ0), 0 },
73 { "lance", SYS_DEV_LANCE, KV(KN230_SYS_LANCE), 0 },
74 { "sii", SYS_DEV_SCSI, KV(KN230_SYS_SII), 0 },
75 { "mc146818", SYS_DEV_BOGUS, KV(KN230_SYS_CLOCK), 0 }
[all...] |
| ibus_3max.c | 45 { "mc146818", SYS_DEV_BOGUS, KV(KN02_SYS_CLOCK), 0 },
46 { "dc", SYS_DEV_SCC0, KV(KN02_SYS_DZ), 0 },
|
| /src/sys/arch/pmax/include/ |
| tc_machdep.h | 85 #define KV(x) ((tc_addr_t)MIPS_PHYS_TO_KSEG1(x))
|
| /src/sys/arch/alpha/pci/ |
| mcpcia_pci.c | 47 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
115 dp = (pcireg_t *)KV(paddr);
147 dp = (pcireg_t *)KV(paddr);
|
| dwlpx_pci.c | 48 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
154 dp = (pcireg_t *)KV(paddr);
222 dp = (pcireg_t *)KV(paddr);
|
| dwlpx.c | 54 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
91 if (badaddr(KV(PCIA_CTL(1) + ls), sizeof (ctl)) != 0) {
198 if (badaddr(KV(PCIA_CTL(sc->dwlpx_nhpc) + ls),
|
| mcpcia.c | 86 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
93 badaddr((void *)KV(((((unsigned long) gid) << MCBUS_GID_SHIFT) | \
|
| /src/sys/arch/alpha/mcbus/ |
| mcbus.c | 57 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
59 (!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (uint32_t)))
|
| /src/sys/arch/alpha/gbus/ |
| gbus.c | 57 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
|
| /src/sys/arch/alpha/tlsb/ |
| kftxx.c | 64 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
|
| tlsbreg.h | 69 KV((long)TLSB_NODE_ADDR((_node)) + (_reg))
83 #define TLSB_BCAST_REG_ADDR(_reg) KV((long)(TLSB_BCASE_BASE + (_reg)))
|
| tlsb.c | 62 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
|
| /src/sys/arch/alpha/alpha/ |
| dec_kn8ae.c | 56 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
|
| /src/libexec/ld.aout_so/ |
| ld.so.sparc.uue | 185 M`$G@!"`(T`0@'*(0(`#2`B`@@*1`%-0"H!B2`L`)^`(@%*0"0`KV`B`8%H``
978 M&)H0`!KV(Z!<D!`@`)(0(,=``!>-EA`@`+`0``B!Q^`(D^@`"2]U<W(O8FEN
|
| ld.so.arm.uue | 434 MRFD`5..#```*:@!4XV0```KV`0#J;)$;Y6X`6>.L```*;P!9X]0```KP`0#J
|
| /src/tests/usr.bin/netpgpverify/ |
| t_netpgpverify.sh | 1063 KV+B2KVVAh2gskxNAzl5yKlZwnkjXS99hrHeNWiqdfqKPmBRcqGCVfm8YGbwK6ia
6436 KV+4d3tq/r//6t5v+f/3/+Jv/tW/+dt/+3Z2y7ZgS+O/GKibWprRzoJqNXSshzbm
|
