| /src/sys/external/bsd/drm2/include/linux/ |
| bitfield.h | 34 #define FIELD_GET(MASK, VAR) __SHIFTOUT(VAR, MASK)
|
| /src/external/mit/lua/dist/src/ |
| lctype.h | 50 #define MASK(B) (1 << (B))
61 #define lislalpha(c) testprop(c, MASK(ALPHABIT))
62 #define lislalnum(c) testprop(c, (MASK(ALPHABIT) | MASK(DIGITBIT)))
63 #define lisdigit(c) testprop(c, MASK(DIGITBIT))
64 #define lisspace(c) testprop(c, MASK(SPACEBIT))
65 #define lisprint(c) testprop(c, MASK(PRINTBIT))
66 #define lisxdigit(c) testprop(c, MASK(XDIGITBIT))
|
| /src/external/bsd/jemalloc/include/jemalloc/internal/ |
| extent_structs.h | 89 #define MASK(CURRENT_FIELD_WIDTH, CURRENT_FIELD_SHIFT) ((((((uint64_t)0x1U) << (CURRENT_FIELD_WIDTH)) - 1)) << (CURRENT_FIELD_SHIFT))
93 #define EXTENT_BITS_ARENA_MASK MASK(EXTENT_BITS_ARENA_WIDTH, EXTENT_BITS_ARENA_SHIFT)
97 #define EXTENT_BITS_SLAB_MASK MASK(EXTENT_BITS_SLAB_WIDTH, EXTENT_BITS_SLAB_SHIFT)
101 #define EXTENT_BITS_COMMITTED_MASK MASK(EXTENT_BITS_COMMITTED_WIDTH, EXTENT_BITS_COMMITTED_SHIFT)
105 #define EXTENT_BITS_DUMPABLE_MASK MASK(EXTENT_BITS_DUMPABLE_WIDTH, EXTENT_BITS_DUMPABLE_SHIFT)
109 #define EXTENT_BITS_ZEROED_MASK MASK(EXTENT_BITS_ZEROED_WIDTH, EXTENT_BITS_ZEROED_SHIFT)
113 #define EXTENT_BITS_STATE_MASK MASK(EXTENT_BITS_STATE_WIDTH, EXTENT_BITS_STATE_SHIFT)
117 #define EXTENT_BITS_SZIND_MASK MASK(EXTENT_BITS_SZIND_WIDTH, EXTENT_BITS_SZIND_SHIFT)
121 #define EXTENT_BITS_NFREE_MASK MASK(EXTENT_BITS_NFREE_WIDTH, EXTENT_BITS_NFREE_SHIFT)
|
| /src/external/bsd/jemalloc.old/dist/include/jemalloc/internal/ |
| extent_structs.h | 89 #define MASK(CURRENT_FIELD_WIDTH, CURRENT_FIELD_SHIFT) ((((((uint64_t)0x1U) << (CURRENT_FIELD_WIDTH)) - 1)) << (CURRENT_FIELD_SHIFT))
93 #define EXTENT_BITS_ARENA_MASK MASK(EXTENT_BITS_ARENA_WIDTH, EXTENT_BITS_ARENA_SHIFT)
97 #define EXTENT_BITS_SLAB_MASK MASK(EXTENT_BITS_SLAB_WIDTH, EXTENT_BITS_SLAB_SHIFT)
101 #define EXTENT_BITS_COMMITTED_MASK MASK(EXTENT_BITS_COMMITTED_WIDTH, EXTENT_BITS_COMMITTED_SHIFT)
105 #define EXTENT_BITS_DUMPABLE_MASK MASK(EXTENT_BITS_DUMPABLE_WIDTH, EXTENT_BITS_DUMPABLE_SHIFT)
109 #define EXTENT_BITS_ZEROED_MASK MASK(EXTENT_BITS_ZEROED_WIDTH, EXTENT_BITS_ZEROED_SHIFT)
113 #define EXTENT_BITS_STATE_MASK MASK(EXTENT_BITS_STATE_WIDTH, EXTENT_BITS_STATE_SHIFT)
117 #define EXTENT_BITS_SZIND_MASK MASK(EXTENT_BITS_SZIND_WIDTH, EXTENT_BITS_SZIND_SHIFT)
121 #define EXTENT_BITS_NFREE_MASK MASK(EXTENT_BITS_NFREE_WIDTH, EXTENT_BITS_NFREE_SHIFT)
|
| /src/external/bsd/jemalloc.old/include/jemalloc/internal/ |
| extent_structs.h | 89 #define MASK(CURRENT_FIELD_WIDTH, CURRENT_FIELD_SHIFT) ((((((uint64_t)0x1U) << (CURRENT_FIELD_WIDTH)) - 1)) << (CURRENT_FIELD_SHIFT))
93 #define EXTENT_BITS_ARENA_MASK MASK(EXTENT_BITS_ARENA_WIDTH, EXTENT_BITS_ARENA_SHIFT)
97 #define EXTENT_BITS_SLAB_MASK MASK(EXTENT_BITS_SLAB_WIDTH, EXTENT_BITS_SLAB_SHIFT)
101 #define EXTENT_BITS_COMMITTED_MASK MASK(EXTENT_BITS_COMMITTED_WIDTH, EXTENT_BITS_COMMITTED_SHIFT)
105 #define EXTENT_BITS_DUMPABLE_MASK MASK(EXTENT_BITS_DUMPABLE_WIDTH, EXTENT_BITS_DUMPABLE_SHIFT)
109 #define EXTENT_BITS_ZEROED_MASK MASK(EXTENT_BITS_ZEROED_WIDTH, EXTENT_BITS_ZEROED_SHIFT)
113 #define EXTENT_BITS_STATE_MASK MASK(EXTENT_BITS_STATE_WIDTH, EXTENT_BITS_STATE_SHIFT)
117 #define EXTENT_BITS_SZIND_MASK MASK(EXTENT_BITS_SZIND_WIDTH, EXTENT_BITS_SZIND_SHIFT)
121 #define EXTENT_BITS_NFREE_MASK MASK(EXTENT_BITS_NFREE_WIDTH, EXTENT_BITS_NFREE_SHIFT)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| gk20a.h | 32 #define MASK(w) ((1 << (w)) - 1)
51 (MASK(GPCPLL_CFG3_VCO_CTRL_WIDTH) << GPCPLL_CFG3_VCO_CTRL_SHIFT)
61 (MASK(GPCPLL_COEFF_N_WIDTH) << GPCPLL_COEFF_N_SHIFT)
89 #define GPC2CLK_OUT_VCODIV_MASK (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << \
94 #define GPC2CLK_OUT_INIT_MASK ((MASK(GPC2CLK_OUT_SDIV14_INDIV4_WIDTH) << \
96 | (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << GPC2CLK_OUT_VCODIV_SHIFT)\
97 | (MASK(GPC2CLK_OUT_BYPDIV_WIDTH) << GPC2CLK_OUT_BYPDIV_SHIFT))
|
| /src/external/gpl3/gcc/dist/gcc/config/i386/ |
| avx512pfintrin.h | 204 #define _mm512_mask_prefetch_i32gather_pd(INDEX, MASK, ADDR, SCALE, HINT) \
205 __builtin_ia32_gatherpfdpd ((__mmask8) (MASK), (__v8si)(__m256i) (INDEX), \
209 #define _mm512_mask_prefetch_i32gather_ps(INDEX, MASK, ADDR, SCALE, HINT) \
210 __builtin_ia32_gatherpfdps ((__mmask16) (MASK), (__v16si)(__m512i) (INDEX),\
222 #define _mm512_mask_prefetch_i64gather_pd(INDEX, MASK, ADDR, SCALE, HINT) \
223 __builtin_ia32_gatherpfqpd ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX), \
226 #define _mm512_mask_prefetch_i64gather_ps(INDEX, MASK, ADDR, SCALE, HINT) \
227 __builtin_ia32_gatherpfqps ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX), \
238 #define _mm512_mask_prefetch_i32scatter_pd(ADDR, MASK, INDEX, SCALE, HINT) \
239 __builtin_ia32_scatterpfdpd ((__mmask8) (MASK), (__v8si)(__m256i) (INDEX),
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/i386/ |
| avx512pfintrin.h | 204 #define _mm512_mask_prefetch_i32gather_pd(INDEX, MASK, ADDR, SCALE, HINT) \
205 __builtin_ia32_gatherpfdpd ((__mmask8) (MASK), (__v8si)(__m256i) (INDEX), \
209 #define _mm512_mask_prefetch_i32gather_ps(INDEX, MASK, ADDR, SCALE, HINT) \
210 __builtin_ia32_gatherpfdps ((__mmask16) (MASK), (__v16si)(__m512i) (INDEX),\
222 #define _mm512_mask_prefetch_i64gather_pd(INDEX, MASK, ADDR, SCALE, HINT) \
223 __builtin_ia32_gatherpfqpd ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX), \
226 #define _mm512_mask_prefetch_i64gather_ps(INDEX, MASK, ADDR, SCALE, HINT) \
227 __builtin_ia32_gatherpfqps ((__mmask8) (MASK), (__v8di)(__m512i) (INDEX), \
238 #define _mm512_mask_prefetch_i32scatter_pd(ADDR, MASK, INDEX, SCALE, HINT) \
239 __builtin_ia32_scatterpfdpd ((__mmask8) (MASK), (__v8si)(__m256i) (INDEX),
[all...] |
| /src/lib/libm/src/ |
| s_modfl.c | 55 #define MASK ((uint64_t)-1)
57 #define MASK ((uint32_t)-1)
60 #define GETFRAC(bits, n) ((bits) & ~(MASK << (n)))
|
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| bits.c | 71 return ((word) & MASK(start, stop));
90 & MASK(start+(63-stop), 63));
108 return ((word & MASK(start+(63-stop), 63))
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| bits.c | 71 return ((word) & MASK(start, stop));
90 & MASK(start+(63-stop), 63));
108 return ((word & MASK(start+(63-stop), 63))
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/ |
| amdgpu_hw_gpio.c | 50 REG_GET(MASK_reg, MASK, &gpio->store.mask);
59 REG_UPDATE(MASK_reg, MASK, gpio->store.mask);
155 * program the pin as GPIO, mask out signal driven by HW */
157 REG_UPDATE(MASK_reg, MASK, 1);
161 * program the pin as GPIO, mask out signal driven by HW */
163 REG_UPDATE(MASK_reg, MASK, 1);
169 REG_UPDATE(MASK_reg, MASK, 1);
173 REG_UPDATE(MASK_reg, MASK, 0)
[all...] |
| generic_regs.h | 40 GENERIC_GPIO_REG_LIST_ENTRY(MASK, cd, id),\
|
| /src/usr.bin/nfsstat/ |
| nfsstat.c | 77 #define MASK(a) (1 << NFSPROC_##a)
79 (MASK(GETATTR) | MASK(SETATTR) | MASK(LOOKUP) | MASK(READ) | \
80 MASK(WRITE) | MASK(RENAME)| MASK(ACCESS) | MASK(READDIR) | \
81 MASK(READDIRPLUS)
84 int mask; member in struct:shortprocs
411 int mask = shortprocs[i].mask; local
[all...] |
| /src/external/gpl3/gdb/dist/bfd/ |
| elfxx-aarch64.c | 29 #define MASK(n) ((1u << (n)) - 1)
48 return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
55 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
63 return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
64 | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
71 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10)
[all...] |
| /src/external/gpl3/gdb.old/dist/bfd/ |
| elfxx-aarch64.c | 28 #define MASK(n) ((1u << (n)) - 1)
47 return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
54 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
62 return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
63 | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
70 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10)
[all...] |
| /src/external/gpl3/binutils/dist/opcodes/ |
| arc-ext.h | 81 #define INSERT_XOP(OP, NAME, CODE, MASK, CPU, ARG, FLG) \
85 (OP)->mask = MASK; \
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| arc-ext.h | 81 #define INSERT_XOP(OP, NAME, CODE, MASK, CPU, ARG, FLG) \
85 (OP)->mask = MASK; \
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| arc-ext.h | 81 #define INSERT_XOP(OP, NAME, CODE, MASK, CPU, ARG, FLG) \
85 (OP)->mask = MASK; \
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| arc-ext.h | 81 #define INSERT_XOP(OP, NAME, CODE, MASK, CPU, ARG, FLG) \
85 (OP)->mask = MASK; \
|
| /src/sys/dev/pci/ |
| pvscsi.h | 66 #define MASK(v) ((1 << (v)) - 1)
149 #define PVSCSI_FLAG_RESERVED_MASK (~MASK(5))
153 #define PVSCSI_INTR_CMPL_MASK MASK(2)
157 #define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)
159 #define PVSCSI_INTR_ALL_SUPPORTED MASK(4)
|
| /src/crypto/external/apache2/openssl/dist/crypto/aes/asm/ |
| aes-riscv64-zvkb-zvkned.pl | 73 my ($MASK) = ("v0");
83 # Setup mask into v0
84 # The mask pattern for 4*N-th elements
85 # mask v0: [000100010001....]
87 # We could setup the mask just for the maximum element length instead of
91 @{[vmv_v_x $MASK, $T0]}
98 @{[vrev8_v $V31, $V31, $MASK]}
105 @{[viota_m $V20, $MASK, $MASK]}
108 @{[vadd_vv $V16, $V16, $V20, $MASK]}
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_cursor.c | 51 MASK(NV_CIO_CRE_HCUR_ASI) |
57 MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);
|
| /src/external/gpl3/binutils/dist/bfd/ |
| elfxx-aarch64.c | 31 #define MASK(n) ((1u << (n)) - 1)
50 return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
57 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
65 return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
66 | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
73 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10)
[all...] |
| /src/external/gpl3/binutils.old/dist/bfd/ |
| elfxx-aarch64.c | 29 #define MASK(n) ((1u << (n)) - 1)
48 return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
55 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
63 return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
64 | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
71 return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10)
[all...] |
