| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 404 SDValue visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference);
410 SDValue visitUADDOLike(SDValue N0, SDValue N1, SDNode *N);
416 SDValue visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn, SDNode *N);
424 SDValue visitSDIVLike(SDValue N0, SDValue N1, SDNode *N);
426 SDValue visitUDIVLike(SDValue N0, SDValue N1, SDNode *N);
435 SDValue visitANDLike(SDValue N0, SDValue N1, SDNode *N);
437 SDValue visitORLike(SDValue N0, SDValue N1, SDNode *N);
525 const SDLoc &DL, SDValue N0,
527 SDValue reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0,
529 SDValue reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0,
[all...] |
| TargetLowering.cpp | 3027 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0,
3032 std::swap(N0, N1);
3040 return DAG.getVectorShuffle(VT, DL, N0, N1, Mask);
3141 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
3147 if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND)
3148 std::swap(N0, N1);
3150 EVT OpVT = N0.getValueType();
3151 if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() ||
3156 if (N0.getOperand(0) == N1) {
3157 X = N0.getOperand(1)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 1367 SDValue N0 = N->getOperand(0);
1370 if (!N0.isMachineOpcode() ||
1371 N0.getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG ||
1372 N0.getConstantOperandVal(1) != X86::sub_8bit)
1378 SDValue N00 = N0.getOperand(0);
1690 SDValue N0 = N.getOperand(0);
1691 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
1695 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
1700 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
1703 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) {
[all...] |
| X86ISelLowering.cpp | 7550 SDValue N0 = N.getOperand(0);
7554 if (!getTargetConstantBitsFromNode(IsAndN ? N0 : N1, 8, UndefElts, EltBits))
7566 Ops.push_back(IsAndN ? N1 : N0);
7572 SDValue N0 = peekThroughBitcasts(N.getOperand(0));
7574 if (!N0.getValueType().isVector() || !N1.getValueType().isVector())
7578 if (!getTargetShuffleInputs(N0, SrcInputs0, SrcMask0, DAG, Depth + 1,
7602 Ops.push_back(N0);
7753 SDValue N0 = N.getOperand(0);
7755 assert(N0.getValueType().getVectorNumElements() == (NumElts / 2) &&
7766 if ((!(N0.isUndef() || EltsLHS.isNullValue()) &
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 141 SDValue N0 = N.getOperand(0);
143 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
147 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
152 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
155 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) {
159 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress();
160 //AM.SymbolFlags = cast<BlockAddressSDNode>(N0)->getTargetFlags();
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kISelDAGToDAG.cpp | 529 SDValue N0 = N.getOperand(0);
540 if (auto *G = dyn_cast<GlobalAddressSDNode>(N0)) {
547 } else if (auto *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
555 } else if (auto *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
558 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) {
560 } else if (auto *J = dyn_cast<JumpTableSDNode>(N0)) {
563 } else if (auto *BA = dyn_cast<BlockAddressSDNode>(N0)) {
583 if (auto *G = dyn_cast<GlobalAddressSDNode>(N0)) {
587 } else if (auto *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
592 } else if (auto *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 2615 SDValue N0 = Op.getOperand(0);
2618 if (N0.getValueType() == MVT::f32)
2619 return DAG.getNode(AMDGPUISD::FP_TO_FP16, DL, Op.getValueType(), N0);
2626 assert(N0.getSimpleValueType() == MVT::f64);
2634 SDValue U = DAG.getNode(ISD::BITCAST, DL, MVT::i64, N0);
2980 SDValue N0 = N->getOperand(0);
2984 if (N0.getOpcode() == ISD::TRUNCATE) {
2989 SDValue Src = N0.getOperand(0);
3289 SDValue N0, SDValue N1, unsigned Size, bool Signed) {
3292 return DAG.getNode(MulOpc, SL, MVT::i32, N0, N1)
[all...] |
| AMDGPUISelDAGToDAG.cpp | 919 SDValue &N0, SDValue &N1) {
940 N0 = BaseLo.getOperand(0).getOperand(0);
1210 SDValue N0 = Addr.getOperand(0);
1213 if (isDSOffsetLegal(N0, C1->getSExtValue())) {
1214 // (add n0, c0)
1215 Base = N0;
1314 SDValue N0 = Addr.getOperand(0);
1320 // (add n0, c0)
1321 if (isDSOffset2Legal(N0, OffsetValue0, OffsetValue1, Size)) {
1322 Base = N0;
[all...] |
| SIISelLowering.cpp | 7816 SDValue N0 = Offset;
7819 if ((C1 = dyn_cast<ConstantSDNode>(N0)))
7820 N0 = SDValue();
7821 else if (DAG.isBaseWithConstantOffset(N0)) {
7822 C1 = cast<ConstantSDNode>(N0.getOperand(1));
7823 N0 = N0.getOperand(0);
7844 if (!N0)
7845 N0 = OverflowVal;
7847 SDValue Ops[] = { N0, OverflowVal }
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 8965 SDNode *N0 = N->getOperand(0).getNode();
8967 return N0->hasOneUse() && N1->hasOneUse() &&
8968 isSignExtended(N0, DAG) && isSignExtended(N1, DAG);
8976 SDNode *N0 = N->getOperand(0).getNode();
8978 return N0->hasOneUse() && N1->hasOneUse() &&
8979 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG);
8990 SDNode *N0 = Op.getOperand(0).getNode();
8994 bool isN0SExt = isSignExtended(N0, DAG);
8999 bool isN0ZExt = isZeroExtended(N0, DAG);
9006 if (isN1SExt && isAddSubSExt(N0, DAG))
[all...] |
| /src/external/lgpl3/mpfr/dist/tests/ |
| tprintf.c | 552 #define N0 20
554 for (i = 1; i <= N0; i++)
556 char s[N0+4];
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 583 SDValue N0 = Op.getOperand(0);
587 if (N0.getOpcode() == ISD::ADD) {
588 AddOp = N0;
592 OtherOp = N0;
1634 SDValue N0 = N->getOperand(0);
1637 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1639 EVT VT = N0.getValueType();
1643 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2);
1662 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2);
1670 SDValue N0 = N->getOperand(0)
[all...] |
| /src/crypto/external/apache2/openssl/dist/crypto/bn/asm/ |
| armv8-mont.pl | 66 $n0="x4"; # const BN_ULONG *n0,
112 ldr $n0,[$n0] // *n0
122 mul $m1,$lo0,$n0 // "tp[0]"*n0
193 mul $m1,$lo0,$n0
299 my ($A0,$A1,$N0,$N1)=map("v$_",(0..3));
309 my ($rptr,$aptr,$bptr,$nptr,$n0,$num)=map("x$_",(0..5))
[all...] |
| ppc64-mont.pl | 127 $n0="r7";
176 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23";
287 ld $n0,0($n0) ; pull n0[0] value
300 mulld $t7,$t7,$n0 ; tp[0]*n0
301 ; transfer (ap[0]*bp[0])*n0 to FPU as 4x16-bit values
322 mr $n1,$n0
327 lwz $n0,0($n1) ; pull n0[0,1] valu
[all...] |
| armv4-mont.pl | 82 $n0="r8";
166 ldr $n0,[$_n0] @ &n0
170 ldr $n0,[$n0] @ *n0
174 str $n0,[$_n0] @ save n0 value
175 mul $n0,$alo,$n0 @ "tp[0]"*n
[all...] |
| /src/crypto/external/bsd/openssl/dist/crypto/bn/asm/ |
| armv8-mont.pl | 66 $n0="x4"; # const BN_ULONG *n0,
111 ldr $n0,[$n0] // *n0
121 mul $m1,$lo0,$n0 // "tp[0]"*n0
192 mul $m1,$lo0,$n0
297 my ($A0,$A1,$N0,$N1)=map("v$_",(0..3));
307 my ($rptr,$aptr,$bptr,$nptr,$n0,$num)=map("x$_",(0..5))
[all...] |
| ppc64-mont.pl | 127 $n0="r7";
176 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23";
287 ld $n0,0($n0) ; pull n0[0] value
300 mulld $t7,$t7,$n0 ; tp[0]*n0
301 ; transfer (ap[0]*bp[0])*n0 to FPU as 4x16-bit values
322 mr $n1,$n0
327 lwz $n0,0($n1) ; pull n0[0,1] valu
[all...] |
| armv4-mont.pl | 82 $n0="r8";
166 ldr $n0,[$_n0] @ &n0
170 ldr $n0,[$n0] @ *n0
174 str $n0,[$_n0] @ save n0 value
175 mul $n0,$alo,$n0 @ "tp[0]"*n
[all...] |
| /src/crypto/external/bsd/openssl.old/dist/crypto/bn/asm/ |
| ppc64-mont.pl | 123 $n0="r7";
172 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23";
283 ld $n0,0($n0) ; pull n0[0] value
296 mulld $t7,$t7,$n0 ; tp[0]*n0
297 ; transfer (ap[0]*bp[0])*n0 to FPU as 4x16-bit values
318 mr $n1,$n0
323 lwz $n0,0($n1) ; pull n0[0,1] valu
[all...] |
| armv4-mont.pl | 80 $n0="r8";
157 ldr $n0,[$_n0] @ &n0
161 ldr $n0,[$n0] @ *n0
165 str $n0,[$_n0] @ save n0 value
166 mul $n0,$alo,$n0 @ "tp[0]"*n
[all...] |
| /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.cp/ |
| nsalias.exp | 256 {name n0}
267 {name N0}
|
| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.cp/ |
| nsalias.exp | 256 {name n0}
267 {name N0}
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 1445 SDValue N0 = N->getOperand(0);
1447 if (N0.getNode()->hasOneUse())
1448 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes))
1451 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes))
1459 SDValue N0 = N->getOperand(0);
1464 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false))
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelDAGToDAG.cpp | 412 SDValue N0 = Node->getOperand(0);
413 if (ShAmt < 16 && N0.getOpcode() == ISD::AND && N0.hasOneUse() &&
414 isa<ConstantSDNode>(N0.getOperand(1))) {
415 uint64_t Mask = N0.getConstantOperandVal(1);
420 CurDAG->getMachineNode(RISCV::SLLI, DL, VT, N0->getOperand(0),
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 4312 /// operands N0 and N1. This is a helper for PerformADDCombine that is
4315 static SDValue PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1,
4321 EVT VT=N0.getValueType();
4327 if (N0.getOpcode() == ISD::MUL) {
4334 !N0.getNode()->hasOneUse())
4339 N0.getOperand(0), N0.getOperand(1), N1);
4341 else if (N0.getOpcode() == ISD::FMUL) {
4358 for (SDNode::use_iterator UI = N0.getNode()->use_begin(),
4359 UE = N0.getNode()->use_end()
[all...] |
