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  /src/lib/libc/arch/i386/sys/
brk.S 71 movl PIC_GOT(CURBRK),%edx # set up GOT addressing
  /src/lib/libc/arch/x86_64/sys/
brk.S 66 movq PIC_GOT(CURBRK),%rdx # set up GOT addressing
  /src/lib/libm/arch/vax/
n_cabs.S 72 movl 4(%ap),%r2 # indirect addressing is necessary here
100 movq (%r4)+,%r0 # %r0:%r1 = x via indirect addressing
101 movq (%r4),%r2 # %r2:%r3 = y via indirect addressing
113 movq %r2,(%r4) # (again addressing is indirect)
  /src/external/gpl3/gdb/dist/sim/testsuite/pru/
subreg.s 1 # Check that subregister addressing works.
  /src/external/gpl3/gdb.old/dist/sim/testsuite/pru/
subreg.s 1 # Check that subregister addressing works.
  /src/sys/arch/x68k/stand/xxboot/
boot.S 40 | - must access any labels before first_kbyte by PC relative addressing
96 | we cannot use RELOC() yet so that use absolute addressing.
  /src/external/gpl3/gcc/dist/libgcc/config/rl78/
adddi3.S 30 movw hl, sp ; use HL-based addressing (allows for direct addw)
subdi3.S 30 movw hl, sp ; use HL-based addressing (allows for direct subw)
  /src/external/gpl3/gcc.old/dist/libgcc/config/rl78/
adddi3.S 30 movw hl, sp ; use HL-based addressing (allows for direct addw)
subdi3.S 30 movw hl, sp ; use HL-based addressing (allows for direct subw)
  /src/sys/arch/m68k/060sp/dist/
changes 49 3) For an opclass three FP instruction where the effective addressing
  /src/external/lgpl3/gmp/dist/mpn/x86/p6/
aors_n.asm 34 C * Avoid indexed addressing, it makes us stall on the two-ported register
  /src/external/gpl3/gdb/dist/sim/testsuite/aarch64/
ldn_multiple.s 4 # Check the addressing modes: no offset, post-index immediate offset,
ldn_single.s 5 # Check the addressing modes: no offset, post-index immediate offset,
stn_multiple.s 4 # Check the addressing modes: no offset, post-index immediate offset,
stn_single.s 5 # Check the addressing modes: no offset, post-index immediate offset,
ldnr.s 5 # Check the addressing modes: no offset, post-index immediate offset,
  /src/external/gpl3/gdb.old/dist/sim/testsuite/aarch64/
ldn_multiple.s 4 # Check the addressing modes: no offset, post-index immediate offset,
ldn_single.s 5 # Check the addressing modes: no offset, post-index immediate offset,
stn_multiple.s 4 # Check the addressing modes: no offset, post-index immediate offset,
stn_single.s 5 # Check the addressing modes: no offset, post-index immediate offset,
  /src/sys/arch/mips/mips/
locore_mips3.S 820 li v0, MIPS_SR_KX | MIPS_SR_UX # allow 64bit addressing
822 li v0, MIPS_SR_KX # allow 64bit kernel addressing
  /src/external/lgpl3/gmp/dist/mpn/sparc64/ultrasparct3/
cnd_aors_n.asm 39 C We use a double-pointer trick to allow indexed addressing. Its setup
  /src/external/lgpl3/gmp/dist/mpn/x86/k7/mmx/
com.asm 46 C (offset by the size, as per the loop addressing) and one high limb
  /src/external/lgpl3/gmp/dist/mpn/x86_64/
rsh1aors_n.asm 45 C * Rewrite to use indexed addressing, like addlsh1.asm and sublsh1.asm.

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