| /src/usr.bin/make/unit-tests/ |
| dotwait.exp | 25 cycle.1.99
26 cycle.1.99
27 make: Graph cycles through `cycle.2.99'
28 make: Graph cycles through `cycle.2.98'
29 make: Graph cycles through `cycle.2.97'
|
| dotwait.mk | 5 TESTS= simple recursive shared cycle
56 # cycle: the cyclic dependency must not cause infinite recursion
58 cycle: cycle.1.99 .WAIT cycle.2.99
59 cycle.2.99: cycle.2.98 _ECHOUSE
60 cycle.2.98: cycle.2.97 _ECHOUSE
61 cycle.2.97: cycle.2.99 _ECHOUS
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 37 // the scoreboard. We always make the scoreboard at least 1 cycle deep to
118 int cycle = Stalls; local
131 // We must find one of the stage's units free for every cycle the
135 int StageCycle = cycle + (int)i;
159 LLVM_DEBUG(dbgs() << "*** Hazard in cycle +" << StageCycle << ", ");
165 // Advance the cycle to the next stage.
166 cycle += IS->getNextCycles();
185 unsigned cycle = 0; local
190 // We must reserve one of the stage's units for every cycle the
194 assert(((cycle + i) < RequiredScoreboard.getDepth()) &
[all...] |
| /src/external/gpl3/binutils/dist/include/opcode/ |
| tic6x-opcode-table.h | 132 INSN(abs, l, unary, 1cycle, C62X, 0,
137 INSN(abs, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
142 INSN(abs2, l, unary, 1cycle, C64X, 0,
154 INSN(abssp, s, unary, 1cycle, C67X, 0,
160 INSNE(add, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
165 INSNE(add, l_si_xsi_sl, l, 1_or_2_src, 1cycle, C62X, 0,
170 INSNE(add, l_xsi_sl_sl, l, 1_or_2_src, 1cycle, C62X, 0,
175 INSNE(add, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
180 INSNE(add, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
185 INSNE(add, s_si_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0
[all...] |
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| tic6x-opcode-table.h | 132 INSN(abs, l, unary, 1cycle, C62X, 0,
137 INSN(abs, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
142 INSN(abs2, l, unary, 1cycle, C64X, 0,
154 INSN(abssp, s, unary, 1cycle, C67X, 0,
160 INSNE(add, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
165 INSNE(add, l_si_xsi_sl, l, 1_or_2_src, 1cycle, C62X, 0,
170 INSNE(add, l_xsi_sl_sl, l, 1_or_2_src, 1cycle, C62X, 0,
175 INSNE(add, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
180 INSNE(add, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
185 INSNE(add, s_si_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0
[all...] |
| /src/external/gpl3/gdb.old/dist/include/opcode/ |
| tic6x-opcode-table.h | 132 INSN(abs, l, unary, 1cycle, C62X, 0,
137 INSN(abs, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
142 INSN(abs2, l, unary, 1cycle, C64X, 0,
154 INSN(abssp, s, unary, 1cycle, C67X, 0,
160 INSNE(add, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
165 INSNE(add, l_si_xsi_sl, l, 1_or_2_src, 1cycle, C62X, 0,
170 INSNE(add, l_xsi_sl_sl, l, 1_or_2_src, 1cycle, C62X, 0,
175 INSNE(add, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
180 INSNE(add, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
185 INSNE(add, s_si_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0
[all...] |
| /src/external/gpl3/gdb/dist/include/opcode/ |
| tic6x-opcode-table.h | 132 INSN(abs, l, unary, 1cycle, C62X, 0,
137 INSN(abs, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
142 INSN(abs2, l, unary, 1cycle, C64X, 0,
154 INSN(abssp, s, unary, 1cycle, C67X, 0,
160 INSNE(add, l_si_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
165 INSNE(add, l_si_xsi_sl, l, 1_or_2_src, 1cycle, C62X, 0,
170 INSNE(add, l_xsi_sl_sl, l, 1_or_2_src, 1cycle, C62X, 0,
175 INSNE(add, l_s5_xsi_si, l, 1_or_2_src, 1cycle, C62X, 0,
180 INSNE(add, l_s5_sl_sl, l, 1_or_2_src, 1cycle, C62X, TIC6X_FLAG_NO_CROSS,
185 INSNE(add, s_si_xsi_si, s, 1_or_2_src, 1cycle, C62X, 0
[all...] |
| /src/external/lgpl3/gmp/dist/mpn/riscv/64/ |
| aors_n.asm | 70 ADDSUB t4, t0, t6 C cycle 3, 9, ...
71 CMPCY( t3, t4, t0) C cycle 4, 10, ...
73 add t6, t2, t3 C cycle 5, 11, ...
80 ADDSUB t4, t1, t6 C cycle 0, 6, ...
81 CMPCY( t3, t4, t1) C cycle 1, 7, ...
83 add t6, t2, t3 C cycle 2, 8, ...
|
| aorsmul_1.asm | 64 ADDSUB a6, a5, a6 C cycle 0, 3, ...
67 CMPCY( a5, a6, a5) C cycle 1, 4, ...
69 add a6, a4, a5 C cycle 2, 5, ...
|
| mul_1.asm | 49 add a6, a5, a6 C cycle 0, 3, ...
50 sltu a5, a6, a5 C cycle 1, 4, ...
52 add a6, a7, a5 C cycle 2, 5, ...
|
| /src/external/gpl3/gcc/dist/gcc/ |
| mcf.cc | 36 cancel_negative_cycle: While G contains a negative cost cycle C, reverse
37 the flow on the found cycle by the minimum residual capacity in that
38 cycle.
87 /* Residual flow for this edge - used during negative cycle canceling. */
768 /* Finds a negative cycle in the residual network using
769 the Bellman-Ford algorithm. The flow on the found cycle is reversed by the
770 minimum residual capacity of that cycle. ENTRY and EXIT vertices are not
778 CYCLE - Vector to hold the minimum cost cycle
781 true if a negative cycle was found, false otherwise. *
1307 int *cycle; local
[all...] |
| modulo-sched.cc | 72 Note: this is different from the cycle-scheduling of schedule_insns;
105 /* The minimum (absolute) cycle that a node of ps was scheduled in. */
108 /* The maximum (absolute) cycle that a node of ps was scheduled in. */
129 /* The (absolute) cycle in which the PS instruction is scheduled.
131 int cycle;
183 /* The earliest absolute cycle of an insn in the partial schedule. */
186 /* The latest absolute cycle of an insn in the partial schedule. */
236 int time; /* The absolute scheduling cycle. */
467 the CYCLE of U and MIN_CYCLE.
470 because the stages may not be aligned on cycle 0. *
130 int cycle; member in struct:ps_insn
3164 int cycle; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/ |
| mcf.cc | 36 cancel_negative_cycle: While G contains a negative cost cycle C, reverse
37 the flow on the found cycle by the minimum residual capacity in that
38 cycle.
87 /* Residual flow for this edge - used during negative cycle canceling. */
768 /* Finds a negative cycle in the residual network using
769 the Bellman-Ford algorithm. The flow on the found cycle is reversed by the
770 minimum residual capacity of that cycle. ENTRY and EXIT vertices are not
778 CYCLE - Vector to hold the minimum cost cycle
781 true if a negative cycle was found, false otherwise. *
1307 int *cycle; local
[all...] |
| modulo-sched.cc | 72 Note: this is different from the cycle-scheduling of schedule_insns;
105 /* The minimum (absolute) cycle that a node of ps was scheduled in. */
108 /* The maximum (absolute) cycle that a node of ps was scheduled in. */
129 /* The (absolute) cycle in which the PS instruction is scheduled.
131 int cycle;
183 /* The earliest absolute cycle of an insn in the partial schedule. */
186 /* The latest absolute cycle of an insn in the partial schedule. */
236 int time; /* The absolute scheduling cycle. */
467 the CYCLE of U and MIN_CYCLE.
470 because the stages may not be aligned on cycle 0. *
130 int cycle; member in struct:ps_insn
3164 int cycle; local
[all...] |
| /src/lib/libmenu/ |
| internals.c | 91 int neighbour, cycle, row_major, edge; local
95 cycle = ((menu->opts & O_NONCYCLIC) != O_NONCYCLIC);
99 if (cycle) {
111 if (cycle)
143 if ((!cycle) && (edge == 1))
150 if (cycle)
184 if ((!cycle) && (edge == 1))
190 if (cycle) {
201 if (cycle)
230 if ((!cycle) && (edge == 1)
[all...] |
| /src/external/gpl2/xcvs/dist/lib/ |
| Makefile.gnulib | 54 ## begin gnulib module cycle-check
56 libgnu_a_SOURCES += cycle-check.c cycle-check.h dev-ino.h
58 ## end gnulib module cycle-check
|
| Makefile.am | 83 ## begin gnulib module cycle-check
85 libcvs_a_SOURCES += cycle-check.c cycle-check.h dev-ino.h
87 ## end gnulib module cycle-check
|
| /src/external/gpl2/xcvs/lib/libcvs/ |
| Makefile | 14 chdir-long.c closeout.c cycle-check.c dirname.c dup-safer.c exitfail.c \
|
| /src/usr.sbin/fwctl/ |
| fwdv.c | 66 {8000*100, 2997}, /* NTSC 8000 cycle / 29.97 Hz */
67 {320, 1}, /* PAL 8000 cycle / 25 Hz */
269 int lsystem=-1, pad_acc, cycle_acc, cycle, f_frac; local
285 cycle_acc = cycle = 0;
370 cycle = 1;
371 cycle_acc = frame_cycle[lsystem].d * cycle;
387 ciph->fdf.dv.cyc = htons(cycle << 12 | f_frac);
404 cycle ++;
412 cycle ++;
|
| /src/sys/arch/macppc/dev/ |
| wdc_obio.c | 218 /* Minimum cycle time is 150ns (DMA MODE 1) on ohare. */
264 int cycle; /* minimum cycle time [ns] */ member in struct:ide_timings
326 min_cycle = pio_timing[piomode].cycle;
342 min_cycle = dma_timing[dmamode].cycle;
392 min_cycle = pio_timing[piomode].cycle;
404 min_cycle = dma_timing[dmamode].cycle;
415 min_cycle = udma_timing[udmamode].cycle;
|
| /src/external/lgpl3/gmp/dist/mpn/x86/k7/mmx/ |
| copyi.asm | 46 C The K7 can do a 64-bit load and 64-bit store in one cycle (optimization
49 C one cycle, so perhaps some scheduling is needed to ensure it's a
50 C load+store in each cycle, not store+store.
|
| /src/distrib/mvme68k/miniroot/ |
| install.md | 208 machine has halted, power-cycle the system to load new boot code.
218 halted, power-cycle the machine in order to load new boot code. Make sure
|
| /src/sys/dev/sbus/ |
| dbrivar.h | 92 int cycle; /* offset of timeslot (bits) */ member in struct:dbri_pipe
|
| /src/sys/modules/examples/luareadhappy/ |
| happy.lua | 32 -- stay), or it loops endlessly in a cycle which does not include 1. Those
46 -- If n is not happy then its sequence ends in the cycle:
|
| /src/crypto/external/apache2/openssl/lib/libcrypto/arch/arm/ |
| aes-armv4.S | 24 @ in one instruction and emit combined result every cycle. The module
|
