1 /* $NetBSD: trap.c,v 1.104 2026/09/28 20:41:00 rkujawa Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 40 * Copyright (C) 1995, 1996 TooLs GmbH. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by TooLs GmbH. 54 * 4. The name of TooLs GmbH may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 #define __UFETCHSTORE_PRIVATE 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.104 2026/09/28 20:41:00 rkujawa Exp $"); 73 74 #ifdef _KERNEL_OPT 75 #include "opt_ddb.h" 76 #include "opt_kgdb.h" 77 #include "opt_ppcarch.h" 78 #include "opt_ppcopts.h" 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/cpu.h> 83 #include <sys/kauth.h> 84 #include <sys/kmem.h> 85 #include <sys/proc.h> 86 #include <sys/ptrace.h> 87 #include <sys/reboot.h> 88 #include <sys/syscall.h> 89 #include <sys/sysctl.h> 90 #include <sys/systm.h> 91 #include <sys/time.h> 92 93 #if defined(KGDB) 94 #include <sys/kgdb.h> 95 #endif 96 97 #include <uvm/uvm_extern.h> 98 99 #include <dev/cons.h> 100 101 #include <machine/fpu.h> 102 #include <machine/frame.h> 103 #include <machine/pcb.h> 104 #include <machine/psl.h> 105 #include <machine/trap.h> 106 107 #include <powerpc/db_machdep.h> 108 #include <powerpc/spr.h> 109 #include <powerpc/userret.h> 110 111 #include <powerpc/ibm4xx/cpu.h> 112 #include <powerpc/ibm4xx/pmap.h> 113 #include <powerpc/ibm4xx/spr.h> 114 #include <powerpc/ibm4xx/tlb.h> 115 116 #include <powerpc/fpu/fpu_extern.h> 117 118 /* These definitions should probably be somewhere else XXX */ 119 #define FIRSTARG 3 /* first argument is in reg 3 */ 120 #define NARGREG 8 /* 8 args are in registers */ 121 #define MOREARGS(sp) ((void *)((int)(sp) + 8)) /* more args go here */ 122 123 void trap(struct trapframe *); /* Called from locore / trap_subr */ 124 #if 0 125 /* Not currently used nor exposed externally in any header file */ 126 int badaddr(void *, size_t); 127 int badaddr_read(void *, size_t, int *); 128 #endif 129 int ctx_setup(int, int); 130 131 #ifndef PPC_NO_UNALIGNED 132 static bool fix_unaligned(struct trapframe *, ksiginfo_t *); 133 #endif 134 135 #ifdef DEBUG 136 #define TDB_ALL 0x1 137 int trapdebug = /* TDB_ALL */ 0; 138 #define DBPRINTF(x, y) if (trapdebug & (x)) printf y 139 #else 140 #define DBPRINTF(x, y) 141 #endif 142 143 #ifdef PPC_IBM440 144 /* 145 * Decode and clear MCSR, handle both kernel and user space. 146 */ 147 static void 148 mchk_report(const char *where, bool print) 149 { 150 const uint32_t mcsr = mfspr(SPR_MCSR); 151 152 if (!print) 153 goto clear; 154 printf("machine check in %s: MCSR 0x%08x MCSRR0 0x%08lx " 155 "MCSRR1 0x%08lx\n", where, mcsr, 156 (u_long)mfspr(SPR_MCSRR0), 157 (u_long)mfspr(SPR_MCSRR1)); 158 printf("machine check cause:%s%s%s%s%s%s%s%s%s%s\n", 159 (mcsr & MCSR_MCS) ? " summary" : "", 160 (mcsr & MCSR_IB) ? " insn-PLB" : "", 161 (mcsr & MCSR_DRB) ? " data-read-PLB" : "", 162 (mcsr & MCSR_DWB) ? " data-write-PLB" : "", 163 (mcsr & MCSR_TLBP) ? " TLB-parity" : "", 164 (mcsr & MCSR_ICP) ? " Icache-parity" : "", 165 (mcsr & MCSR_DCSP) ? " Dcache-search-parity": "", 166 (mcsr & MCSR_DCFP) ? " Dcache-flush-parity" : "", 167 (mcsr & MCSR_IMPE) ? " imprecise" : "", 168 (mcsr == 0) ? " none" : ""); 169 /* TLB parity check can also be TLB multiple hit. */ 170 if ((mcsr & MCSR_TLBP) != 0) 171 ppc44x_tlb_dump(); 172 clear: 173 mtspr(SPR_MCSR, mcsr); 174 } 175 #endif /* PPC_IBM440 */ 176 177 void 178 trap(struct trapframe *tf) 179 { 180 struct lwp *l = curlwp; 181 struct proc *p = l->l_proc; 182 struct pcb *pcb; 183 int type = tf->tf_exc; 184 int ftype, rv; 185 ksiginfo_t ksi; 186 187 KASSERT(l->l_stat == LSONPROC); 188 189 if (tf->tf_srr1 & PSL_PR) { 190 type |= EXC_USER; 191 } 192 193 ftype = VM_PROT_READ; 194 195 DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n", 196 type, tf->tf_srr0, tf, &tf)); 197 198 switch (type) { 199 case EXC_DEBUG|EXC_USER: 200 /* We don't use hardware breakpoints for userland. */ 201 goto brain_damage; 202 203 case EXC_TRC|EXC_USER: 204 KSI_INIT_TRAP(&ksi); 205 ksi.ksi_signo = SIGTRAP; 206 ksi.ksi_trap = EXC_TRC; 207 ksi.ksi_addr = (void *)tf->tf_srr0; 208 trapsignal(l, &ksi); 209 break; 210 211 case EXC_DSI: 212 /* FALLTHROUGH */ 213 case EXC_DTMISS: 214 { 215 struct vm_map *map; 216 vaddr_t va; 217 struct faultbuf *fb; 218 219 pcb = lwp_getpcb(l); 220 fb = pcb->pcb_onfault; 221 222 if (curcpu()->ci_idepth >= 0) { 223 rv = EFAULT; 224 goto out; 225 } 226 227 va = tf->tf_dear; 228 if (tf->tf_pid == KERNEL_PID) { 229 map = kernel_map; 230 } else { 231 map = &p->p_vmspace->vm_map; 232 } 233 234 if (tf->tf_esr & (ESR_DST|ESR_DIZ)) 235 ftype = VM_PROT_WRITE; 236 237 DBPRINTF(TDB_ALL, 238 ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n", 239 tf->tf_srr0, 240 (ftype & VM_PROT_WRITE) ? "write" : "read", 241 (void *)va, tf->tf_esr)); 242 243 pcb->pcb_onfault = NULL; 244 rv = uvm_fault(map, trunc_page(va), ftype); 245 pcb->pcb_onfault = fb; 246 if (rv == 0) 247 return; 248 out: 249 if (fb != NULL) { 250 tf->tf_pid = KERNEL_PID; 251 tf->tf_srr0 = fb->fb_pc; 252 tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */ 253 tf->tf_cr = fb->fb_cr; 254 tf->tf_fixreg[1] = fb->fb_sp; 255 tf->tf_fixreg[2] = fb->fb_r2; 256 tf->tf_fixreg[3] = rv; 257 memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, 258 sizeof(fb->fb_fixreg)); 259 return; 260 } 261 } 262 goto brain_damage; 263 264 case EXC_DSI|EXC_USER: 265 /* FALLTHROUGH */ 266 case EXC_DTMISS|EXC_USER: 267 if (tf->tf_esr & (ESR_DST|ESR_DIZ)) 268 ftype = VM_PROT_WRITE; 269 270 DBPRINTF(TDB_ALL, 271 ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n", 272 tf->tf_srr0, (ftype & VM_PROT_WRITE) ? "write" : "read", 273 tf->tf_dear, tf->tf_esr)); 274 KASSERT(l == curlwp && (l->l_stat == LSONPROC)); 275 // KASSERT(curpcb->pcb_onfault == NULL); 276 rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_dear), 277 ftype); 278 if (rv == 0) { 279 break; 280 } 281 KSI_INIT_TRAP(&ksi); 282 ksi.ksi_trap = EXC_DSI; 283 ksi.ksi_addr = (void *)tf->tf_dear; 284 vm_signal: 285 switch (rv) { 286 case EINVAL: 287 ksi.ksi_signo = SIGBUS; 288 ksi.ksi_code = BUS_ADRERR; 289 break; 290 case EACCES: 291 ksi.ksi_signo = SIGSEGV; 292 ksi.ksi_code = SEGV_ACCERR; 293 break; 294 case ENOMEM: 295 ksi.ksi_signo = SIGKILL; 296 printf("UVM: pid %d.%d (%s), uid %d killed: " 297 "out of swap\n", p->p_pid, l->l_lid, p->p_comm, 298 l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1); 299 break; 300 default: 301 ksi.ksi_signo = SIGSEGV; 302 ksi.ksi_code = SEGV_MAPERR; 303 break; 304 } 305 trapsignal(l, &ksi); 306 break; 307 308 case EXC_ITMISS|EXC_USER: 309 case EXC_ISI|EXC_USER: 310 ftype = VM_PROT_EXECUTE; 311 DBPRINTF(TDB_ALL, 312 ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n", 313 tf->tf_srr0, tf)); 314 // KASSERT(curpcb->pcb_onfault == NULL); 315 rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(tf->tf_srr0), 316 ftype); 317 if (rv == 0) { 318 break; 319 } 320 isi: 321 KSI_INIT_TRAP(&ksi); 322 ksi.ksi_trap = EXC_ISI; 323 ksi.ksi_addr = (void *)tf->tf_srr0; 324 goto vm_signal; 325 break; 326 327 case EXC_AST|EXC_USER: 328 cpu_ast(l, curcpu()); 329 break; 330 331 case EXC_ALI|EXC_USER: 332 if (fix_unaligned(tf, &ksi)) 333 trapsignal(l, &ksi); 334 break; 335 336 case EXC_PGM|EXC_USER: 337 curcpu()->ci_data.cpu_ntrap++; 338 339 KSI_INIT_TRAP(&ksi); 340 ksi.ksi_trap = EXC_PGM; 341 ksi.ksi_addr = (void *)tf->tf_srr0; 342 343 if (tf->tf_esr & ESR_PTR) { 344 vaddr_t va; 345 sigtrap: 346 va = (vaddr_t)tf->tf_srr0; 347 /* 348 * Restore original instruction and clear BP. 349 */ 350 if (p->p_md.md_ss_addr[0] == va || 351 p->p_md.md_ss_addr[1] == va) { 352 rv = ppc_sstep(l, 0); 353 if (rv != 0) 354 goto vm_signal; 355 ksi.ksi_code = TRAP_TRACE; 356 } else 357 ksi.ksi_code = TRAP_BRKPT; 358 if (p->p_raslist != NULL && 359 ras_lookup(p, (void *)va) != (void *)-1) { 360 tf->tf_srr0 += (ksi.ksi_code == TRAP_TRACE) ? 361 0 : 4; 362 break; 363 } 364 ksi.ksi_signo = SIGTRAP; 365 } else if (tf->tf_esr & ESR_PPR) { 366 uint32_t opcode; 367 368 rv = copyin((void *)tf->tf_srr0, &opcode, 369 sizeof(opcode)); 370 if (rv) 371 goto isi; 372 if (emulate_mxmsr(l, tf, opcode)) { 373 tf->tf_srr0 += 4; 374 break; 375 } 376 377 ksi.ksi_code = ILL_PRVOPC; 378 ksi.ksi_signo = SIGILL; 379 } else { 380 pcb = lwp_getpcb(l); 381 382 if (__predict_false(!fpu_used_p(l))) { 383 memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu)); 384 fpu_mark_used(l); 385 } 386 387 if (fpu_emulate(tf, &pcb->pcb_fpu, &ksi)) { 388 if (ksi.ksi_signo == 0) /* was emulated */ 389 break; 390 else if (ksi.ksi_signo == SIGTRAP) 391 goto sigtrap; /* XXX H/W bug? */ 392 } else { 393 ksi.ksi_code = ILL_ILLOPC; 394 ksi.ksi_signo = SIGILL; 395 } 396 } 397 398 trapsignal(l, &ksi); 399 break; 400 401 #ifdef PPC_IBM440 402 case EXC_FPU|EXC_USER: 403 curcpu()->ci_data.cpu_ntrap++; 404 #ifdef PPC_HAVE_FPU 405 fpu_load(); 406 #else 407 /* FPU-less 440: emulate like 40x */ 408 KSI_INIT_TRAP(&ksi); 409 ksi.ksi_trap = EXC_FPU; 410 ksi.ksi_addr = (void *)tf->tf_srr0; 411 412 pcb = lwp_getpcb(l); 413 414 if (__predict_false(!fpu_used_p(l))) { 415 memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu)); 416 fpu_mark_used(l); 417 } 418 419 if (fpu_emulate(tf, &pcb->pcb_fpu, &ksi)) { 420 if (ksi.ksi_signo == 0) /* was emulated */ 421 break; 422 else if (ksi.ksi_signo == SIGTRAP) 423 goto sigtrap; /* XXX H/W bug? */ 424 } else { 425 ksi.ksi_code = ILL_ILLOPC; 426 ksi.ksi_signo = SIGILL; 427 } 428 429 trapsignal(l, &ksi); 430 #endif /* PPC_HAVE_FPU */ 431 break; 432 #endif /* PPC_IBM440 */ 433 434 case EXC_MCHK: 435 { 436 struct faultbuf *fb; 437 438 pcb = lwp_getpcb(l); 439 if ((fb = pcb->pcb_onfault) != NULL) { 440 tf->tf_pid = KERNEL_PID; 441 tf->tf_srr0 = fb->fb_pc; 442 tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */ 443 tf->tf_fixreg[1] = fb->fb_sp; 444 tf->tf_fixreg[2] = fb->fb_r2; 445 tf->tf_fixreg[3] = 1; /* Return TRUE */ 446 tf->tf_cr = fb->fb_cr; 447 memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, 448 sizeof(fb->fb_fixreg)); 449 return; 450 } 451 } 452 #ifdef PPC_IBM440 453 /* 454 * Unrecovered machine check, do what we can. 455 */ 456 mchk_report("kernel", true); 457 #endif /* PPC_IBM440 */ 458 goto brain_damage; 459 460 case EXC_MCHK|EXC_USER: 461 /* 462 * Meh, can happen for example by access to mmaped aperture of 463 * a device where PLB slave errored. SRR0 is only a hint 464 * (it's impresice). 465 */ 466 { 467 static struct timeval mchk_last; 468 static const struct timeval mchk_min = { 1, 0 }; 469 /* Limit to one per second. */ 470 const bool report = ratecheck(&mchk_last, &mchk_min); 471 472 #ifdef PPC_IBM440 473 mchk_report("user", report); 474 #endif /* PPC_IBM440 */ 475 if (report) 476 printf("%s[%d.%d]: machine check, SIGBUS at " 477 "0x%08lx\n", p->p_comm, p->p_pid, l->l_lid, 478 (u_long)tf->tf_srr0); 479 } 480 KSI_INIT_TRAP(&ksi); 481 ksi.ksi_signo = SIGBUS; 482 ksi.ksi_code = BUS_OBJERR; 483 ksi.ksi_trap = EXC_MCHK; 484 ksi.ksi_addr = (void *)tf->tf_srr0; 485 trapsignal(l, &ksi); 486 break; 487 488 default: 489 brain_damage: 490 printf("trap type 0x%x at 0x%lx\n", type, tf->tf_srr0); 491 #if defined(DDB) || defined(KGDB) 492 if (kdb_trap(type, tf)) 493 return; 494 #endif 495 #ifdef TRAP_PANICWAIT 496 printf("Press a key to panic.\n"); 497 cngetc(); 498 #endif 499 panic("trap"); 500 } 501 502 /* Invoke powerpc userret code */ 503 userret(l, tf); 504 } 505 506 int 507 ctx_setup(int ctx, int srr1) 508 { 509 volatile struct pmap *pm; 510 511 /* Update PID if we're returning to user mode. */ 512 if (srr1 & PSL_PR) { 513 pm = curproc->p_vmspace->vm_map.pmap; 514 if (!pm->pm_ctx) { 515 ctx_alloc(__UNVOLATILE(pm)); 516 } 517 ctx = pm->pm_ctx; 518 } 519 else if (!ctx) { 520 ctx = KERNEL_PID; 521 } 522 return (ctx); 523 } 524 525 /* 526 * Used by copyin()/copyout() 527 */ 528 extern vaddr_t vmaprange(struct proc *, vaddr_t, vsize_t, int); 529 extern void vunmaprange(vaddr_t, vsize_t); 530 static int bigcopyin(const void *, void *, size_t ); 531 static int bigcopyout(const void *, void *, size_t ); 532 533 #ifdef PPC_IBM440 534 /* 535 * Optimize if copy is larger than vslock+vmaprange+blkcpy path 536 */ 537 int ibm4xx_copy_bigthresh = 8192; 538 #define COPY_BIGTHRESH ((size_t)ibm4xx_copy_bigthresh) 539 540 SYSCTL_SETUP(sysctl_ibm4xx_copy, "ibm4xx copy threshold") 541 { 542 sysctl_createv(clog, 0, NULL, NULL, 543 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 544 CTLTYPE_INT, "copy_bigthresh", 545 SYSCTL_DESCR("copyin/copyout size above which the " 546 "mapped bulk-copy path is used"), 547 NULL, 0, &ibm4xx_copy_bigthresh, 0, 548 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 549 } 550 #else 551 #define COPY_BIGTHRESH 1024 552 #endif 553 554 #ifdef __clang__ 555 #pragma clang optimize off 556 #endif 557 int 558 copyin(const void *uaddr, void *kaddr, size_t len) 559 { 560 struct pmap *pm = curproc->p_vmspace->vm_map.pmap; 561 int rv, msr, pid, tmp, ctx; 562 struct faultbuf env; 563 564 /* For bigger buffers use the faster copy */ 565 if (len > COPY_BIGTHRESH) 566 return (bigcopyin(uaddr, kaddr, len)); 567 568 if ((rv = setfault(&env))) { 569 curpcb->pcb_onfault = NULL; 570 return rv; 571 } 572 573 if (!(ctx = pm->pm_ctx)) { 574 /* No context -- assign it one */ 575 ctx_alloc(pm); 576 ctx = pm->pm_ctx; 577 } 578 579 __asm volatile ( 580 "mfmsr %[msr];" /* Save MSR */ 581 "li %[tmp],0x20;" /* Disable IMMU */ 582 "andc %[tmp],%[msr],%[tmp];" 583 "mtmsr %[tmp];" 584 "isync;" 585 MFPID(%[pid]) /* Save old PID */ 586 587 "srwi. %[tmp],%[len],0x2;" /* How many words? */ 588 "beq- 2f;" /* No words. Go do bytes */ 589 "mtctr %[tmp];" 590 591 "1:" MTPID(%[ctx]) 592 "isync;" 593 #ifdef PPC_IBM403 594 "lswi %[tmp],%[uaddr],4;" /* Load user word */ 595 #else 596 "lwz %[tmp],0(%[uaddr]);" 597 #endif 598 "addi %[uaddr],%[uaddr],0x4;" /* next uaddr word */ 599 "sync;" 600 601 MTPID(%[pid]) 602 "isync;" 603 #ifdef PPC_IBM403 604 "stswi %[tmp],%[kaddr],4;" /* Store kernel word */ 605 #else 606 "stw %[tmp],0(%[kaddr]);" 607 #endif 608 "addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */ 609 "sync;" 610 "bdnz 1b;" /* repeat */ 611 612 "2:" "andi. %[tmp],%[len],0x3;" /* How many remaining bytes? */ 613 "beq 10f;" 614 "mtxer %[tmp];" 615 616 MTPID(%[ctx]) 617 "isync;" 618 "lswx %[tmp],0,%[uaddr];" /* Load user bytes */ 619 "sync;" 620 621 MTPID(%[pid]) 622 "isync;" 623 "stswx %[tmp],0,%[kaddr];" /* Store kernel bytes */ 624 "sync;" 625 626 "10:" "mtmsr %[msr];" /* Restore MSR */ 627 "isync;" 628 629 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp) 630 : [uaddr] "b" (uaddr), [kaddr] "b" (kaddr), 631 [ctx] "r" (ctx), [len] "r" (len) 632 : "cr0", "ctr", "xer"); 633 634 curpcb->pcb_onfault = NULL; 635 return 0; 636 } 637 #ifdef __clang__ 638 #pragma clang optimize on 639 #endif 640 641 static int 642 bigcopyin(const void *uaddr, void *kaddr, size_t len) 643 { 644 const char *up; 645 char *kp = kaddr; 646 struct lwp *l = curlwp; 647 struct proc *p; 648 struct faultbuf env; 649 int error; 650 651 p = l->l_proc; 652 653 /* 654 * Stolen from physio(): 655 */ 656 error = uvm_vslock(p->p_vmspace, __UNCONST(uaddr), len, VM_PROT_READ); 657 if (error) { 658 return error; 659 } 660 up = (char *)vmaprange(p, (vaddr_t)uaddr, len, VM_PROT_READ); 661 662 if ((error = setfault(&env)) == 0) { 663 #ifdef PPC_IBM440 664 ibm4xx_blkcpy(kp, up, len, true); 665 #else 666 memcpy(kp, up, len); 667 #endif 668 } 669 670 curpcb->pcb_onfault = NULL; 671 vunmaprange((vaddr_t)up, len); 672 uvm_vsunlock(p->p_vmspace, __UNCONST(uaddr), len); 673 674 return error; 675 } 676 677 #ifdef __clang__ 678 #pragma clang optimize off 679 #endif 680 int 681 copyout(const void *kaddr, void *uaddr, size_t len) 682 { 683 struct pmap *pm = curproc->p_vmspace->vm_map.pmap; 684 int rv, msr, pid, tmp, ctx; 685 struct faultbuf env; 686 687 /* For big copies use more efficient routine */ 688 if (len > COPY_BIGTHRESH) 689 return (bigcopyout(kaddr, uaddr, len)); 690 691 if ((rv = setfault(&env))) { 692 curpcb->pcb_onfault = NULL; 693 return rv; 694 } 695 696 if (!(ctx = pm->pm_ctx)) { 697 /* No context -- assign it one */ 698 ctx_alloc(pm); 699 ctx = pm->pm_ctx; 700 } 701 702 __asm volatile ( 703 "mfmsr %[msr];" /* Save MSR */ 704 "li %[tmp],0x20;" /* Disable IMMU */ 705 "andc %[tmp],%[msr],%[tmp];" 706 "mtmsr %[tmp];" 707 "isync;" 708 MFPID(%[pid]) /* Save old PID */ 709 710 "srwi. %[tmp],%[len],0x2;" /* How many words? */ 711 "beq- 2f;" /* No words. Go do bytes */ 712 "mtctr %[tmp];" 713 714 "1:" 715 #ifdef PPC_IBM403 716 "lswi %[tmp],%[kaddr],4;" /* Load kernel word */ 717 #else 718 "lwz %[tmp],0(%[kaddr]);" 719 #endif 720 "addi %[kaddr],%[kaddr],0x4;" /* next kaddr word */ 721 "sync;" 722 723 MTPID(%[ctx]) 724 "isync;" 725 #ifdef PPC_IBM403 726 "stswi %[tmp],%[uaddr],4;" /* Store user word */ 727 #else 728 "stw %[tmp],0(%[uaddr]);" 729 #endif 730 "addi %[uaddr],%[uaddr],0x4;" /* next uaddr word */ 731 "sync;" 732 733 MTPID(%[pid]) 734 "isync;" 735 "bdnz 1b;" /* repeat */ 736 737 "2:" "andi. %[tmp],%[len],0x3;" /* How many remaining bytes? */ 738 "beq 10f;" 739 "mtxer %[tmp];" 740 741 "lswx %[tmp],0,%[kaddr];" /* Load kernel bytes */ 742 "sync;" 743 744 MTPID(%[ctx]) 745 "isync;" 746 "stswx %[tmp],0,%[uaddr];" /* Store user bytes */ 747 "sync;" 748 749 MTPID(%[pid]) /* Restore PID and MSR */ 750 "10:" "mtmsr %[msr];" 751 "isync;" 752 753 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp) 754 : [uaddr] "b" (uaddr), [kaddr] "b" (kaddr), 755 [ctx] "r" (ctx), [len] "r" (len) 756 : "cr0", "ctr", "xer"); 757 758 curpcb->pcb_onfault = NULL; 759 return 0; 760 } 761 #ifdef __clang__ 762 #pragma clang optimize on 763 #endif 764 765 static int 766 bigcopyout(const void *kaddr, void *uaddr, size_t len) 767 { 768 char *up; 769 const char *kp = (const char *)kaddr; 770 struct lwp *l = curlwp; 771 struct proc *p; 772 struct faultbuf env; 773 int error; 774 775 p = l->l_proc; 776 777 /* 778 * Stolen from physio(): 779 */ 780 error = uvm_vslock(p->p_vmspace, uaddr, len, VM_PROT_WRITE); 781 if (error) { 782 return error; 783 } 784 up = (char *)vmaprange(p, (vaddr_t)uaddr, len, 785 VM_PROT_READ | VM_PROT_WRITE); 786 787 if ((error = setfault(&env)) == 0) { 788 #ifdef PPC_IBM440 789 ibm4xx_blkcpy(up, kp, len, true); 790 #else 791 memcpy(up, kp, len); 792 #endif 793 } 794 795 curpcb->pcb_onfault = NULL; 796 vunmaprange((vaddr_t)up, len); 797 uvm_vsunlock(p->p_vmspace, uaddr, len); 798 799 return error; 800 } 801 802 #ifdef PPC_IBM440 803 /* 804 * Bulk copy tuned for the 440/460EX 805 */ 806 #ifndef PPC_4XX_NOCACHE 807 #define __BLKCPY_LOOP(ZERO) \ 808 __asm volatile( \ 809 "mtctr %[n];" \ 810 "1: dcbt %[s],%[pf];" \ 811 ZERO \ 812 "lwz %[t0],0(%[s]);" \ 813 "lwz %[t1],4(%[s]);" \ 814 "lwz %[t2],8(%[s]);" \ 815 "lwz %[t3],12(%[s]);" \ 816 "lwz %[t4],16(%[s]);" \ 817 "lwz %[t5],20(%[s]);" \ 818 "lwz %[t6],24(%[s]);" \ 819 "lwz %[t7],28(%[s]);" \ 820 "stw %[t0],0(%[d]);" \ 821 "stw %[t1],4(%[d]);" \ 822 "stw %[t2],8(%[d]);" \ 823 "stw %[t3],12(%[d]);" \ 824 "stw %[t4],16(%[d]);" \ 825 "stw %[t5],20(%[d]);" \ 826 "stw %[t6],24(%[d]);" \ 827 "stw %[t7],28(%[d]);" \ 828 "addi %[s],%[s],32;" \ 829 "addi %[d],%[d],32;" \ 830 "bdnz 1b;" \ 831 : [s] "+b" (s), [d] "+b" (d), \ 832 [t0] "=&r" (t0), [t1] "=&r" (t1), \ 833 [t2] "=&r" (t2), [t3] "=&r" (t3), \ 834 [t4] "=&r" (t4), [t5] "=&r" (t5), \ 835 [t6] "=&r" (t6), [t7] "=&r" (t7) \ 836 : [n] "r" (nlines), [pf] "b" (3 * CACHELINESIZE) \ 837 : "ctr", "memory") 838 #endif /* !PPC_4XX_NOCACHE */ 839 840 void 841 ibm4xx_blkcpy(void *dst, const void *src, size_t len, bool dcbz_ok) 842 { 843 #ifdef PPC_4XX_NOCACHE 844 /* All RAM is mapped caching-inhibited: dcbz would trap. */ 845 memcpy(dst, src, len); 846 #else 847 uint8_t *d = dst; 848 const uint8_t *s = src; 849 size_t head, nlines, tail; 850 851 /* 852 * below three cache lines the setup and prefetch buy nothing? 853 */ 854 if (len < 3 * CACHELINESIZE || 855 (((uintptr_t)d ^ (uintptr_t)s) & 3) != 0) { 856 memcpy(dst, src, len); 857 return; 858 } 859 860 head = (uintptr_t)(-(intptr_t)(uintptr_t)d) & (CACHELINESIZE - 1); 861 if (head != 0) { 862 memcpy(d, s, head); 863 d += head; 864 s += head; 865 len -= head; 866 } 867 nlines = len / CACHELINESIZE; 868 tail = len & (CACHELINESIZE - 1); 869 870 if (nlines != 0) { 871 uint32_t t0, t1, t2, t3, t4, t5, t6, t7; 872 873 if (dcbz_ok) 874 __BLKCPY_LOOP("dcbz 0,%[d];"); 875 else 876 __BLKCPY_LOOP(""); 877 } 878 879 if (tail != 0) 880 memcpy(d, s, tail); 881 #endif /* PPC_4XX_NOCACHE */ 882 } 883 884 #ifdef BLKCPY_SELFTEST 885 /* 886 * This is supposed to verify correctness of the above 440/460 blkcpy 887 */ 888 #define BLKCPY_TESTLEN 8192 889 #define BLKCPY_GUARD 64 890 891 void 892 ibm4xx_blkcpy_selftest(void) 893 { 894 static const size_t lens[] = { 895 0, 1, 3, 31, 32, 33, 63, 64, 65, 95, 96, 97, 255, 896 1023, 1024, 1025, 4095, 4096, 8000 897 }; 898 uint8_t *src, *dstbuf, *ref, *dst; 899 size_t i, len, off; 900 int soff, doff, z, cases = 0; 901 902 src = kmem_alloc(BLKCPY_TESTLEN + 8, KM_SLEEP); 903 ref = kmem_alloc(BLKCPY_TESTLEN + 8, KM_SLEEP); 904 dstbuf = kmem_alloc(BLKCPY_TESTLEN + 8 + 2 * BLKCPY_GUARD, 905 KM_SLEEP); 906 dst = dstbuf + BLKCPY_GUARD; 907 908 for (i = 0; i < BLKCPY_TESTLEN + 8; i++) 909 src[i] = (i * 251 + 13) & 0xff; 910 911 for (i = 0; i < __arraycount(lens); i++) { 912 len = lens[i]; 913 for (soff = 0; soff < 8; soff++) { 914 for (doff = 0; doff < 8; doff++) { 915 for (z = 0; z < 2; z++) { 916 memset(dstbuf, 0xa5, 917 BLKCPY_TESTLEN + 8 + 918 2 * BLKCPY_GUARD); 919 memset(ref, 0xa5, 920 BLKCPY_TESTLEN + 8); 921 memcpy(ref + doff, src + soff, len); 922 ibm4xx_blkcpy(dst + doff, src + soff, 923 len, z != 0); 924 if (memcmp(dst + doff, ref + doff, 925 len) != 0) 926 panic("blkcpy selftest: " 927 "payload len=%zu soff=%d " 928 "doff=%d dcbz=%d", 929 len, soff, doff, z); 930 for (off = 0; 931 off < BLKCPY_TESTLEN + 8 + 932 2 * BLKCPY_GUARD; off++) { 933 if (off >= BLKCPY_GUARD + doff 934 && off < BLKCPY_GUARD + 935 doff + len) 936 continue; 937 if (dstbuf[off] != 0xa5) 938 panic("blkcpy " 939 "selftest: guard " 940 "len=%zu soff=%d " 941 "doff=%d dcbz=%d " 942 "off=%zu", 943 len, soff, doff, 944 z, off); 945 } 946 cases++; 947 } 948 } 949 } 950 } 951 952 kmem_free(src, BLKCPY_TESTLEN + 8); 953 kmem_free(ref, BLKCPY_TESTLEN + 8); 954 kmem_free(dstbuf, BLKCPY_TESTLEN + 8 + 2 * BLKCPY_GUARD); 955 956 printf("ibm4xx_blkcpy: self-test passed (%d cases)\n", cases); 957 } 958 #endif /* BLKCPY_SELFTEST */ 959 #endif /* PPC_IBM440 */ 960 961 /* 962 * kcopy(const void *src, void *dst, size_t len); 963 * 964 * Copy len bytes from src to dst, aborting if we encounter a fatal 965 * page fault. 966 * 967 * kcopy() _must_ save and restore the old fault handler since it is 968 * called by uiomove(), which may be in the path of servicing a non-fatal 969 * page fault. 970 */ 971 int 972 kcopy(const void *src, void *dst, size_t len) 973 { 974 struct faultbuf env, *oldfault; 975 int rv; 976 977 oldfault = curpcb->pcb_onfault; 978 if ((rv = setfault(&env))) { 979 curpcb->pcb_onfault = oldfault; 980 return rv; 981 } 982 983 #ifdef PPC_IBM440 984 ibm4xx_blkcpy(dst, src, len, false); 985 #else 986 memcpy(dst, src, len); 987 #endif 988 989 curpcb->pcb_onfault = oldfault; 990 return 0; 991 } 992 993 #if 0 994 int 995 badaddr(void *addr, size_t size) 996 { 997 998 return badaddr_read(addr, size, NULL); 999 } 1000 1001 int 1002 badaddr_read(void *addr, size_t size, int *rptr) 1003 { 1004 struct faultbuf env; 1005 int x; 1006 1007 /* Get rid of any stale machine checks that have been waiting. */ 1008 __asm volatile ("sync; isync"); 1009 1010 if (setfault(&env)) { 1011 curpcb->pcb_onfault = NULL; 1012 __asm volatile ("sync"); 1013 return 1; 1014 } 1015 1016 __asm volatile ("sync"); 1017 1018 switch (size) { 1019 case 1: 1020 x = *(volatile int8_t *)addr; 1021 break; 1022 case 2: 1023 x = *(volatile int16_t *)addr; 1024 break; 1025 case 4: 1026 x = *(volatile int32_t *)addr; 1027 break; 1028 default: 1029 panic("badaddr: invalid size (%d)", size); 1030 } 1031 1032 /* Make sure we took the machine check, if we caused one. */ 1033 __asm volatile ("sync; isync"); 1034 1035 curpcb->pcb_onfault = NULL; 1036 __asm volatile ("sync"); /* To be sure. */ 1037 1038 /* Use the value to avoid reorder. */ 1039 if (rptr) 1040 *rptr = x; 1041 1042 return 0; 1043 } 1044 #endif 1045 1046 #ifndef PPC_NO_UNALIGNED 1047 static bool 1048 fix_unaligned(struct trapframe *tf, ksiginfo_t *ksi) 1049 { 1050 1051 KSI_INIT_TRAP(ksi); 1052 ksi->ksi_signo = SIGBUS; 1053 ksi->ksi_trap = EXC_ALI; 1054 ksi->ksi_addr = (void *)tf->tf_dear; 1055 return true; 1056 } 1057 #endif 1058 1059 /* 1060 * XXX Extremely lame implementations of _ufetch_* / _ustore_*. IBM 4xx 1061 * experts should make versions that are good. 1062 */ 1063 1064 #define UFETCH(sz) \ 1065 int \ 1066 _ufetch_ ## sz(const uint ## sz ## _t *uaddr, uint ## sz ## _t *valp) \ 1067 { \ 1068 return copyin(uaddr, valp, sizeof(*valp)); \ 1069 } 1070 1071 UFETCH(8) 1072 UFETCH(16) 1073 UFETCH(32) 1074 1075 #define USTORE(sz) \ 1076 int \ 1077 _ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \ 1078 { \ 1079 return copyout(&val, uaddr, sizeof(val)); \ 1080 } 1081 1082 USTORE(8) 1083 USTORE(16) 1084 USTORE(32) 1085