| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/ |
| rtsm_ve-aemv8a.dts | 13 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 interrupt-parent = <&gic>;
97 gic: interrupt-controller@2c001000 { label
98 compatible = "arm,gic-400", "arm,cortex-a15-gic";
138 interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
139 <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
140 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
141 <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
142 <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| fvp-base-revc.dts | 13 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 interrupt-parent = <&gic>;
115 gic: interrupt-controller@2f000000 { label
116 compatible = "arm,gic-v3";
131 compatible = "arm,gic-v3-its";
164 interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
165 <0 0 0 2 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
166 <0 0 0 3 &gic 0 0 GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
167 <0 0 0 4 &gic 0 0 GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
200 interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| foundation-v8.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
130 interrupt-map = <0 0 0 &gic 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
131 <0 0 1 &gic 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
132 <0 0 2 &gic 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
133 <0 0 3 &gic 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
134 <0 0 4 &gic 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
135 <0 0 5 &gic 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
136 <0 0 6 &gic 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
137 <0 0 7 &gic 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| vexpress-v2m-rs1.dtsi | 20 #include <dt-bindings/interrupt-controller/arm-gic.h>
111 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
112 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
113 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
114 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
115 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
116 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
117 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
118 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
119 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| foundation-v8-gicv2.dtsi | 8 gic: interrupt-controller@2c001000 { label
9 compatible = "arm,gic-400", "arm,cortex-a15-gic";
|
| foundation-v8-gicv3.dtsi | 8 gic: interrupt-controller@2f000000 { label
9 compatible = "arm,gic-v3";
23 compatible = "arm,gic-v3-its";
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| bcm5301x.dtsi | 15 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
88 gic: interrupt-controller@21000 { label
89 compatible = "arm,cortex-a9-gic";
171 <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
174 <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
175 <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
176 <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
177 <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
178 <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| bcm53573.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
41 gic: interrupt-controller@1000 { label
42 compatible = "arm,cortex-a7-gic";
82 <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
85 <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
88 <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
89 <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
90 <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
91 <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| vexpress-v2m-rs1.dtsi | 20 #include <dt-bindings/interrupt-controller/arm-gic.h>
111 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
112 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
113 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
114 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
115 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
116 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
117 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
118 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
119 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| vexpress-v2m.dtsi | 20 #include <dt-bindings/interrupt-controller/arm-gic.h>
32 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
33 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
34 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
35 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
36 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
37 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
38 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
39 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
40 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>
[all...] |
| exynos54xx.dtsi | 30 interrupt-parent = <&gic>;
83 <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
84 <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
85 <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
86 <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
87 <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
88 <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
89 <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
90 <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
|
| milbeaut-m10v.dtsi | 5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
58 interrupt-parent = <&gic>;
60 gic: interrupt-controller@1d000000 { label
61 compatible = "arm,cortex-a7-gic";
|
| mt6580.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
76 interrupt-parent = <&gic>;
80 gic: interrupt-controller@10211000 { label
81 compatible = "arm,cortex-a7-gic";
84 interrupt-parent = <&gic>;
|
| mt8127.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
83 interrupt-parent = <&gic>;
116 interrupt-parent = <&gic>;
120 gic: interrupt-controller@10211000 { label
121 compatible = "arm,cortex-a7-gic";
124 interrupt-parent = <&gic>;
|
| vexpress-v2p-ca5s.dts | 19 interrupt-parent = <&gic>;
121 gic: interrupt-controller@2c001000 { label
122 compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
220 interrupt-map = <0 0 &gic 0 36 4>,
221 <0 1 &gic 0 37 4>,
222 <0 2 &gic 0 38 4>,
223 <0 3 &gic 0 39 4>;
|
| vf500.dtsi | 6 #include <dt-bindings/interrupt-controller/arm-gic.h>
29 compatible = "arm,cortex-a9-gic";
|
| hip01.dtsi | 12 interrupt-parent = <&gic>;
16 gic: interrupt-controller@1e001000 { label
17 compatible = "arm,cortex-a9-gic";
35 interrupt-parent = <&gic>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/cavium/ |
| thunder2-99xx.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
58 gic: interrupt-controller@400080000 { label
59 compatible = "arm,gic-v3";
70 gicits: gic-its@40010000 {
71 compatible = "arm,gic-v3-its";
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
121 <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
122 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
123 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIG
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| s32v234.dtsi | 7 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
87 gic: interrupt-controller@7d001000 { label
88 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
104 interrupt-parent = <&gic>;
111 interrupt-parent = <&gic>;
127 interrupt-parent = <&gic>;
|
| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/mti/ |
| malta.dts | 5 #include <dt-bindings/interrupt-controller/mips-gic.h>
23 gic: interrupt-controller@1bdc0000 { label
24 compatible = "mti,gic";
31 * Declare the interrupt-parent even though the mti,gic
39 compatible = "mti,gic-timer";
50 interrupt-parent = <&gic>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt6755.dtsi | 15 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 interrupt-parent = <&gic>;
113 interrupt-parent = <&gic>;
117 gic: interrupt-controller@10231000 { label
118 compatible = "arm,gic-400";
120 interrupt-parent = <&gic>;
|
| mt6795.dtsi | 15 #include <dt-bindings/interrupt-controller/arm-gic.h>
109 interrupt-parent = <&gic>;
125 interrupt-parent = <&gic>;
129 gic: interrupt-controller@10221000 { label
130 compatible = "arm,gic-400";
132 interrupt-parent = <&gic>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
| zynqmp.dtsi | 105 interrupt-parent = <&gic>;
133 interrupt-parent = <&gic>;
153 interrupt-parent = <&gic>;
201 interrupt-parent = <&gic>;
228 interrupt-parent = <&gic>;
240 interrupt-parent = <&gic>;
256 interrupt-parent = <&gic>;
270 interrupt-parent = <&gic>;
283 interrupt-parent = <&gic>;
296 interrupt-parent = <&gic>;
370 gic: interrupt-controller@f9010000 { label
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/ |
| armada-ap810-ap0.dtsi | 8 #include <dt-bindings/interrupt-controller/arm-gic.h>
32 interrupt-parent = <&gic>;
40 interrupt-parent = <&gic>;
42 gic: interrupt-controller@3000000 { label
43 compatible = "arm,gic-v3";
58 compatible = "arm,gic-v3-its";
|
| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/img/ |
| boston.dts | 7 #include <dt-bindings/interrupt-controller/mips-gic.h>
48 interrupt-parent = <&gic>;
78 interrupt-parent = <&gic>;
108 interrupt-parent = <&gic>;
181 gic: interrupt-controller@16120000 { label
182 compatible = "mti,gic";
189 compatible = "mti,gic-timer";
227 interrupt-parent = <&gic>;
|
