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  /src/share/mk/
bsd.buildinstall.mk 4 # build_install logic for src/Makefile
bsd.nls.mk 68 ##### Pull in related .mk logic
bsd.rpc.mk 73 ##### Pull in related .mk logic
bsd.hostlib.mk 52 ##### Pull in related .mk logic
bsd.kinc.mk 81 ##### Pull in related .mk logic
bsd.info.mk 89 ##### Pull in related .mk logic
bsd.dep.mk 112 ##### Pull in related .mk logic
bsd.dtb.mk 105 ##### Pull in related .mk logic
bsd.files.mk 157 ##### Pull in related .mk logic
bsd.hostprog.mk 150 ##### Pull in related .mk logic
bsd.man.mk 304 ##### Pull in related .mk logic
bsd.test.mk 209 ##### Pull in related .mk logic
bsd.kmodule.mk 274 ##### Pull in related .mk logic
bsd.doc.mk 214 ##### Pull in related .mk logic
bsd.x11.mk 500 ##### Pull in related .mk logic
bsd.prog.mk 638 ##### Pull in related .mk logic
bsd.lib.mk 964 ##### Pull in related .mk logic
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
vexpress-v2p-ca9.dts 216 /* Test Chip internal logic voltage */
225 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
234 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
261 /* Local board supply for miscellaneous logic external to the Test Chip */
270 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
277 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
284 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
291 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
rk3288-veyron.dtsi 100 vdd_logic: vdd-logic {
264 * powered together. To simplify the logic in the dts
integratorap.dts 115 * logic modules.
243 * Logic module bus, we support up to 4 logical modules
  /src/sys/arch/mac68k/mac68k/
pramasm.s 287 bne NoWrit | go around de-write protect logic
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/
rk3399-gru-chromebook.dtsi 81 ppvar_logic: ppvar-logic {
rk3399-pinebook-pro.dts 241 /* RK3399 logic supply */
482 /* rk3399 center logic supply */
  /src/sys/dev/ic/
arcofi.c 27 * The FIFO logic buffers up to 128 bytes. When using 8 bit samples and
28 * the logic set to interrupt every half FIFO, the device will interrupt
144 * Glue logic registers
658 #error Please rework the cr3 handling logic.
1135 * Reset logic.
  /src/common/dist/zlib/
make_vms.com 602 $! 0.02 20031022 Added logic for defines with value
724 $! 0.02 20120226 Add pre-load logic

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