1 /* $NetBSD: ibm4xx_460ex_pll.c,v 1.1 2026/09/28 20:41:00 rkujawa Exp $ */ 2 3 /*- 4 * Copyright (c) 2026 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Radoslaw Kujawa. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * AMCC 460EX/GT PLL straps decode. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: ibm4xx_460ex_pll.c,v 1.1 2026/09/28 20:41:00 rkujawa Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 42 #include <powerpc/ibm4xx/cpu.h> 43 #include <powerpc/ibm4xx/dcr4xx.h> 44 #include <powerpc/ibm4xx/ibm4xx_460ex_pll.h> 45 46 /* LFSR coded divisors. */ 47 static const uint8_t ibm4xx_460ex_fwdv_code[] = { 48 0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c, 49 0x05, 0x08, 0x07, 0x02, 0x0b, 0x06 50 }; 51 52 static const uint8_t ibm4xx_460ex_fbdv_code[] = { 53 0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4, 54 0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb, 55 0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96, 56 0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde, 57 0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb, 58 0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91, 59 0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b, 60 0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95, 61 0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4, 62 0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc, 63 0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3, 64 0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90, 65 0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe, 66 0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6, 67 0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd, 68 0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1, 69 0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6, 70 0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9, 71 0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e, 72 0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf, 73 0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae, 74 0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2, 75 0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2, 76 0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98, 77 0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81, 78 0x03, 0x87, 0x0f, 0x9f, 0x3f 79 }; 80 81 static u_int 82 ibm4xx_460ex_pll_div(const uint8_t *tab, size_t n, uint32_t code) 83 { 84 size_t i; 85 86 for (i = 0; i < n; i++) 87 if (tab[i] == code) 88 return i + 1; 89 return 0; 90 } 91 92 /* 93 * The PLL clock in MHz. 0 if the straps don't have that configuration. 94 */ 95 u_int 96 ibm4xx_460ex_base_clock(uint32_t cpu_hz) 97 { 98 uint32_t strap; 99 u_int fwdva, fbdv; 100 101 strap = mfsdr(DCR_SDR0_SDSTP0); 102 if (__SHIFTOUT(strap, SDR0_SDSTP0_SEL) != 0) 103 return 0; 104 105 fwdva = ibm4xx_460ex_pll_div(ibm4xx_460ex_fwdv_code, 106 __arraycount(ibm4xx_460ex_fwdv_code), 107 __SHIFTOUT(strap, SDR0_SDSTP0_FWDVA)); 108 fbdv = ibm4xx_460ex_pll_div(ibm4xx_460ex_fbdv_code, 109 __arraycount(ibm4xx_460ex_fbdv_code), 110 __SHIFTOUT(strap, SDR0_SDSTP0_FBDV)); 111 if (fwdva == 0 || fbdv == 0) 112 return 0; 113 114 return ((cpu_hz / 100000) * fwdva / fbdv) / 10; 115 } 116 117