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  /src/usr.bin/make/unit-tests/
cond-cmp-numeric-eq.mk 45 # typically 16 or 17 significant digits, therefore these two numbers seem to
varname-dot-suffixes.mk 37 # Now the suffixes list is not empty anymore. It may seem strange that there
  /src/external/bsd/wpa/dist/hs20/client/
Android.mk 18 # The LOCAL_EXPORT_C_INCLUDE_DIRS from ICU did not seem to fully resolve the
  /src/external/gpl3/gdb/dist/
djunpack.bat 48 echo FAIL: the file %1 does not seem to exist.
  /src/external/gpl3/gdb.old/dist/
djunpack.bat 48 echo FAIL: the file %1 does not seem to exist.
  /src/external/lgpl3/gmp/dist/mpn/pa32/hppa1_1/
mul_1.asm 46 C PA7100, respectively. We don't do that since it does not seem worth the
  /src/external/lgpl3/gmp/dist/mpn/powerpc32/
mode1o.asm 55 C 3-5 cycles faster on 750. For now it doesn't seem worth bothering with.
  /src/external/lgpl3/gmp/dist/mpn/x86/k7/
mod_34lsub1.asm 41 C The loop form below and the 64 byte code alignment seem necessary for the
mode1o.asm 44 C With the loop running at just 11 cycles it doesn't seem worth bothering to
mul_basecase.asm 208 C inline. Unrolling this doesn't seem worthwhile since it's only run once
211 C popping, and doesn't seem likely to be worthwhile on the typical 13-26
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium/
com.asm 48 C are the same alignment mod 8, but it doesn't seem worth the trouble for
mode1o.asm 246 C Could look for a-c<d and save a division sometimes, but that doesn't seem
  /src/external/lgpl3/gmp/dist/mpn/x86_64/coreisbr/
cnd_add_n.asm 56 C * It might seem natural to use the cmov insn here, but since this function
cnd_sub_n.asm 56 C * It might seem natural to use the cmov insn here, but since this function
  /src/external/lgpl3/gmp/dist/mpn/x86_64/
div_qr_2n_pi1.asm 57 C save and restore that instead, which doesn't seem like a win).
cnd_aors_n.asm 46 C * It might seem natural to use the cmov insn here, but since this function
  /src/external/lgpl3/gmp/dist/mpn/x86/k7/mmx/
divrem_1.asm 90 C that case. It doesn't seem worth checking for this though, since it
432 C A lower bound for the time would seem to be 16 cycles, based on the
730 C would seem to be the lower bound.
  /src/external/lgpl3/gmp/dist/mpn/x86/k6/
mul_basecase.asm 217 C inline. Unrolling this doesn't seem worthwhile since it's only run once
220 C popping, and doesn't seem likely to be worthwhile on the typical 10-20
  /src/external/lgpl3/gmp/dist/mpn/x86/p6/
mul_basecase.asm 211 C about 6.2 c/l. Unrolling this doesn't seem worthwhile since it's only run
214 C and doesn't seem likely to be worthwhile on the typical sizes reaching
aorsmul_1.asm 184 C eliminate this for the plain mpn_add/submul_1 doesn't seem like a good
  /src/external/lgpl3/gmp/dist/mpn/arm/neon/
lshiftc.asm 50 C the shift count for unaligned operands. Not done, since it does not seem to
  /src/external/lgpl3/gmp/dist/mpn/x86/
divrem_1.asm 74 C save 1 cycle, but that doesn't seem to happen in practice, and in any case
sqr_basecase.asm 49 C The mul1 loop is not unrolled like mul_1.asm, it doesn't seem worth the
  /src/external/lgpl3/gmp/dist/mpn/x86/pentium4/sse2/
submul_1.asm 72 C seem as clear.
  /src/external/lgpl3/gmp/dist/mpn/x86/p6/mmx/
divrem_1.asm 387 C micro-ops seem to exist.
684 C micro-ops seem to exist.

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