| /src/external/gpl3/gdb.old/dist/gdb/testsuite/lib/ |
| trace-support.exp | 29 set spreg "rsp"
33 set spreg "esp"
37 set spreg "sp"
41 set spreg "r1"
45 set spreg "r15"
49 set spreg "sp"
|
| /src/external/gpl3/gdb/dist/gdb/testsuite/lib/ |
| trace-support.exp | 29 set spreg "rsp"
33 set spreg "esp"
37 set spreg "sp"
41 set spreg "r1"
45 set spreg "r15"
49 set spreg "sp"
|
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| spreg-gen.py | 20 """Helper to generate spreg.[ch] files."""
43 class Spreg(NamedTuple):
44 """A single spreg entry."""
52 def load_table(source: Path) -> list[Spreg]:
53 """Load the spreg table & return all entries in it."""
65 spreg = Spreg(
71 ret.append(spreg)
103 def gen_header(table: list[Spreg], output: Path) -> None:
104 """Write header to |output| from spreg |table|.""
[all...] |
| local.mk | 46 %D%/spreg.o \
90 %D%/spreg.c: @MAINT@ %D%/ppc-spr-table %D%/spreg-gen.py %D%/$(am__dirstamp)
91 $(AM_V_GEN)$(srcdir)/%D%/spreg-gen.py --source $@.tmp
92 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/%D%/spreg.c
93 $(AM_V_at)touch $(srcdir)/%D%/spreg.c
95 %D%/spreg.h: @MAINT@ %D%/ppc-spr-table %D%/spreg-gen.py %D%/$(am__dirstamp)
96 $(AM_V_GEN)$(srcdir)/%D%/spreg-gen.py --header $@.tmp
97 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/%D%/spreg.
[all...] |
| interrupts.c | 72 spreg srr1_mask = (MASK(0,32)
75 spreg srr1 = (old_msr & srr1_mask & ~srr1_clear) | srr1_set;
117 SRR0 = (spreg)(cia);
167 spreg direction = (is_store ? dsisr_store_operation : 0);
191 DAR = (spreg)ea;
268 DAR = (spreg)ra;
|
| spreg.h | 1 /* DO NOT EDIT: GENERATED BY spreg-gen.py.
24 typedef unsigned_word spreg; typedef
|
| registers.c | 125 description.size = sizeof(spreg);
176 description.size = sizeof(spreg);
|
| vm.h | 135 spreg *sprs,
|
| psim.c | 805 spreg spreg; member in union:__anon19927
835 cooked_buf.spreg = cpu_registers(processor)->spr[description.index];
966 spreg spreg; member in union:__anon19928
1035 cpu_registers(processor)->spr[description.index] = cooked_buf.spreg;
|
| vm.c | 822 spreg ubat,
823 spreg lbat)
843 spreg *raw_bats,
849 spreg ubat = raw_bats[i];
850 spreg lbat = raw_bats[i+1];
921 spreg *sprs,
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| spreg-gen.py | 20 """Helper to generate spreg.[ch] files."""
43 class Spreg(NamedTuple):
44 """A single spreg entry."""
52 def load_table(source: Path) -> list[Spreg]:
53 """Load the spreg table & return all entries in it."""
65 spreg = Spreg(
71 ret.append(spreg)
103 def gen_header(table: list[Spreg], output: Path) -> None:
104 """Write header to |output| from spreg |table|.""
[all...] |
| local.mk | 46 %D%/spreg.o \
90 %D%/spreg.c: @MAINT@ %D%/ppc-spr-table %D%/spreg-gen.py %D%/$(am__dirstamp)
91 $(AM_V_GEN)$(srcdir)/%D%/spreg-gen.py --source $@.tmp
92 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/%D%/spreg.c
93 $(AM_V_at)touch $(srcdir)/%D%/spreg.c
95 %D%/spreg.h: @MAINT@ %D%/ppc-spr-table %D%/spreg-gen.py %D%/$(am__dirstamp)
96 $(AM_V_GEN)$(srcdir)/%D%/spreg-gen.py --header $@.tmp
97 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/%D%/spreg.
[all...] |
| interrupts.c | 72 spreg srr1_mask = (MASK(0,32)
75 spreg srr1 = (old_msr & srr1_mask & ~srr1_clear) | srr1_set;
117 SRR0 = (spreg)(cia);
167 spreg direction = (is_store ? dsisr_store_operation : 0);
191 DAR = (spreg)ea;
268 DAR = (spreg)ra;
|
| spreg.h | 1 /* DO NOT EDIT: GENERATED BY spreg-gen.py.
24 typedef unsigned_word spreg; typedef
|
| registers.c | 125 description.size = sizeof(spreg);
176 description.size = sizeof(spreg);
|
| vm.h | 135 spreg *sprs,
|
| /src/external/gpl3/gdb/lib/libsim/ |
| Makefile | 12 corefile.c model.c spreg.c cpu.c interrupts.c events.c cap.c device.c \
106 # -n spreg.h -hp tmp-spreg.h \
107 # -n spreg.c -p tmp-spreg.c
108 #DGENED_FILES= spreg.h spreg.c
116 # ${MIC} tmp-spreg.h spreg.h
117 # ${MIC} tmp-spreg.c spreg.
[all...] |
| /src/external/gpl3/gdb.old/lib/libsim/ |
| Makefile | 12 corefile.c model.c spreg.c cpu.c interrupts.c events.c cap.c device.c \
106 # -n spreg.h -hp tmp-spreg.h \
107 # -n spreg.c -p tmp-spreg.c
108 #DGENED_FILES= spreg.h spreg.c
116 # ${MIC} tmp-spreg.h spreg.h
117 # ${MIC} tmp-spreg.c spreg.
[all...] |
| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.trace/ |
| trace-break.exp | 197 global spreg
218 "collect \$$spreg" "^$"
250 "Data collected at tracepoint .*, trace frame \[0-9\]:.*\\$${spreg} = .*" \
270 global spreg
292 "collect \$$spreg" "^$"
320 "Data collected at tracepoint .*, trace frame \[0-9\]:.*\\$${spreg} = .*" \
|
| collection.exp | 364 global spreg
382 test_register "\$$spreg" $myregs
670 global spreg
701 gdb_collect_registers_test "\$$fpreg, \$$spreg, \$$pcreg"
|
| /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.trace/ |
| trace-break.exp | 197 global spreg
218 "collect \$$spreg" "^$"
250 "Data collected at tracepoint .*, trace frame \[0-9\]:.*\\$${spreg} = .*" \
270 global spreg
292 "collect \$$spreg" "^$"
320 "Data collected at tracepoint .*, trace frame \[0-9\]:.*\\$${spreg} = .*" \
|
| collection.exp | 364 global spreg
382 test_register "\$$spreg" $myregs
670 global spreg
701 gdb_collect_registers_test "\$$fpreg, \$$spreg, \$$pcreg"
|
| /src/sys/dev/usb/ |
| umcs.c | 448 int spreg = umcs7840_reg_sp(physport); local
462 err = umcs7840_get_reg(sc, spreg, &data);
467 err = umcs7840_set_reg(sc, spreg, data);
732 int spreg = umcs7840_reg_sp(pn); local
750 if (umcs7840_get_reg(sc, spreg, &data))
753 if (umcs7840_set_reg(sc, spreg, data))
756 if (umcs7840_set_reg(sc, spreg, data))
801 if (umcs7840_get_reg(sc, spreg, &data))
804 if (umcs7840_set_reg(sc, spreg, data))
808 if (umcs7840_set_reg(sc, spreg, data)
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/bfin/ |
| bfin.cc | 330 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
334 expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
336 rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
371 XVECEXP (pat, 0, total_consec + 1) = gen_rtx_SET (spreg,
373 spreg,
382 gen_rtx_PLUS (Pmode, spreg,
439 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
443 expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler)
445 rtx postinc1 = gen_rtx_POST_INC (SImode, spreg);
499 = gen_rtx_SET (spreg, gen_rtx_PLUS (Pmode, spreg
1067 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
1151 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/bfin/ |
| bfin.cc | 330 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
334 expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
336 rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
371 XVECEXP (pat, 0, total_consec + 1) = gen_rtx_SET (spreg,
373 spreg,
382 gen_rtx_PLUS (Pmode, spreg,
439 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
443 expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler)
445 rtx postinc1 = gen_rtx_POST_INC (SImode, spreg);
499 = gen_rtx_SET (spreg, gen_rtx_PLUS (Pmode, spreg
1067 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
1151 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
[all...] |
