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  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vf_error.c 46 mutex_lock(&adev->virt.vf_errors.lock);
47 index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
48 adev->virt.vf_errors.code [index] = error_code;
49 adev->virt.vf_errors.flags [index] = error_flags;
50 adev->virt.vf_errors.data [index] = error_data;
51 adev->virt.vf_errors.write_count ++;
52 mutex_unlock(&adev->virt.vf_errors.lock);
63 (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
74 mutex_lock(&adev->virt.vf_errors.lock)
    [all...]
amdgpu_virt.c 102 struct amdgpu_virt *virt = &adev->virt; local in function:amdgpu_virt_request_full_gpu
105 if (virt->ops && virt->ops->req_full_gpu) {
106 r = virt->ops->req_full_gpu(adev, init);
110 adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;
125 struct amdgpu_virt *virt = &adev->virt; local in function:amdgpu_virt_release_full_gpu
128 if (virt->ops && virt->ops->rel_full_gpu)
146 struct amdgpu_virt *virt = &adev->virt; local in function:amdgpu_virt_reset_gpu
168 struct amdgpu_virt *virt = &adev->virt; local in function:amdgpu_virt_wait_reset
    [all...]
amdgpu_mxgpu_ai.c 184 adev->virt.fw_reserve.checksum_key =
243 struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, flr_work); local in function:xgpu_ai_mailbox_flr_work
244 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);
303 schedule_work(&adev->virt.flr_work);
334 adev->virt.ack_irq.num_types = 1;
335 adev->virt.ack_irq.funcs = &xgpu_ai_mailbox_ack_irq_funcs;
336 adev->virt.rcv_irq.num_types = 1;
337 adev->virt.rcv_irq.funcs = &xgpu_ai_mailbox_rcv_irq_funcs;
344 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_BIF, 135, &adev->virt.rcv_irq)
    [all...]
amdgpu_mxgpu_nv.c 186 adev->virt.fw_reserve.checksum_key =
245 struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, flr_work); local in function:xgpu_nv_mailbox_flr_work
246 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);
308 schedule_work(&adev->virt.flr_work);
336 adev->virt.ack_irq.num_types = 1;
337 adev->virt.ack_irq.funcs = &xgpu_nv_mailbox_ack_irq_funcs;
338 adev->virt.rcv_irq.num_types = 1;
339 adev->virt.rcv_irq.funcs = &xgpu_nv_mailbox_rcv_irq_funcs;
346 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_BIF, 135, &adev->virt.rcv_irq)
    [all...]
amdgpu_virt.h 54 * struct amdgpu_virt_ops - amdgpu device virt operations
225 ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field = (val); \
230 (*val) = ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field; \
235 if (!adev->virt.fw_reserve.p_pf2vf) \
238 if (adev->virt.fw_reserve.p_pf2vf->version == 1) \
239 *(val) = ((struct amdgim_pf2vf_info_v1 *)adev->virt.fw_reserve.p_pf2vf)->field; \
240 if (adev->virt.fw_reserve.p_pf2vf->version == 2) \
241 *(val) = ((struct amdgim_pf2vf_info_v2 *)adev->virt.fw_reserve.p_pf2vf)->field; \
264 ((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
267 ((adev)->virt.caps & AMDGPU_SRIOV_CAPS_IS_VF
    [all...]
amdgpu_mxgpu_vi.c 518 struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, flr_work); local in function:xgpu_vi_mailbox_flr_work
519 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);
559 schedule_work(&adev->virt.flr_work);
577 adev->virt.ack_irq.num_types = 1;
578 adev->virt.ack_irq.funcs = &xgpu_vi_mailbox_ack_irq_funcs;
579 adev->virt.rcv_irq.num_types = 1;
580 adev->virt.rcv_irq.funcs = &xgpu_vi_mailbox_rcv_irq_funcs;
587 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 135, &adev->virt.rcv_irq);
591 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 138, &adev->virt.ack_irq)
    [all...]
amdgpu_csa.c 55 adev->virt.csa_cpu_addr = ptr;
amdgpu_nbio_v2_3.c 304 adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
307 adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
311 adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
amdgpu_nbio_v6_1.c 255 adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
258 adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
262 adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
  /src/sys/arch/arm/arm/
psci_arm.S 36 .arch_extension virt
  /src/sys/rump/net/lib/libvirtif/
Makefile 7 VIRTIF= virt
  /src/sys/arch/powerpc/include/
ofw_machdep.h 38 * cell(s) virt
49 vaddr_t virt; member in struct:OF_translation
  /src/sys/arch/shark/stand/ofwboot/
Locore.c 399 OF_claim(void *virt, u_int size, u_int align)
405 void *virt; member in struct:OF_claim::__anon0767e5fd0b08
416 printf("OF_claim(%x, %x, %x) -> ", virt, size, align);
418 args.virt = virt;
434 OF_release(void *virt, u_int size)
440 void *virt; member in struct:OF_release::__anon0767e5fd0c08
449 printf("OF_release(%x, %x)\n", virt, size);
451 args.virt = virt;
482 void *virt; member in struct:OF_chain::__anon0767e5fd0e08
    [all...]
  /src/sys/arch/macppc/stand/ofwboot/
Locore.c 538 OF_claim(void *virt, u_int size, u_int align)
544 void *virt; member in struct:OF_claim::__anonf2cfa9b80b08
555 printf("OF_claim(%p, %x, %x) -> ", virt, size, align);
557 args.virt = virt;
573 OF_release(void *virt, u_int size)
579 void *virt; member in struct:OF_release::__anonf2cfa9b80c08
588 printf("OF_release(%p, %x)\n", virt, size);
590 args.virt = virt;
621 void *virt; member in struct:OF_chain::__anonf2cfa9b80e08
    [all...]
  /src/sys/arch/powerpc/powerpc/
ofwmagic.S 64 # virt-base
66 # virt-size
ofw_machdep.c 372 /* 5 cells per: virt(1), size(1), phys(2), mode(1) */
374 uint32_t virt, size, mode; local in function:ofw_bootstrap_get_translations
403 virt = *rp++;
426 DPRINTF("translation %d virt=%#"PRIx32
428 idx, virt, phys, size, mode);
438 ofw_translations[idx].virt = virt;
  /src/sys/arch/ofppc/stand/ofwboot/
Locore.c 401 OF_claim(void *virt, u_int size, u_int align)
407 void *virt; member in struct:OF_claim::__anonc991dbdc0d08
418 printf("OF_claim(%p, %x, %x) -> ", virt, size, align);
420 args.virt = virt;
436 OF_release(void *virt, u_int size)
442 void *virt; member in struct:OF_release::__anonc991dbdc0e08
451 printf("OF_release(%p, %x)\n", virt, size);
453 args.virt = virt;
484 void *virt; member in struct:OF_chain::__anonc991dbdc1008
    [all...]
ofwstart.S 62 # virt-base
64 # virt-size
  /src/sys/arch/sparc/stand/ofwboot/
Locore.c 404 OF_release(void *virt, u_int size)
410 cell_t virt; member in struct:OF_release::__anon2be4e8fd1008
417 args.virt = ADR2CELL(virt);
817 OF_claim(void *virt, u_int size, u_int align)
825 cell_t virt; member in struct:OF_claim::__anon2be4e8fd1c08
835 args.virt = virt;
851 if (virt == NULL) {
852 if ((virt = (void*)OF_alloc_virt(size, align)) == (void*)-1)
    [all...]
  /src/sys/arch/arm/ofw/
openfirm.c 587 OF_claim(void *virt, u_int size, u_int align)
593 void *virt; member in struct:OF_claim::__anonc50777431308
603 args.virt = virt;
612 OF_release(void *virt, u_int size)
618 void *virt; member in struct:OF_release::__anonc50777431408
626 args.virt = virt;
  /src/sys/arch/emips/ebus/
icap_ebus.c 139 printf(" virt=%p", (void*)sc->sc_dp);
262 vaddr_t virt; local in function:icapstart
315 virt = (vaddr_t)sc->sc_data;
316 phys = kvtophys(virt);
317 count = round_page(virt) - virt;
323 phys2 = kvtophys(virt + count);
  /src/sys/external/bsd/ena-com/
ena_plat.h 296 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) (virt = NULL)
298 #define ENA_MEM_ALLOC_COHERENT_NODE(dmadev, size, virt, phys, handle, node, \
301 ((virt) = NULL); \
305 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, dma) \
308 (virt) = (void *)(dma).vaddr; \
312 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, dma) \
321 (virt) = NULL; \
  /src/sys/arch/atari/atari/
stalloc.c 54 #define PHYS_ADDR(virt) ((u_long)(virt) - st_pool_virt + st_pool_phys)
  /src/sys/external/bsd/drm2/dist/drm/i810/
i810_drv.h 148 volatile char *virt;
158 virt = dev_priv->ring.virtual_start; \
171 *(volatile unsigned int *)(virt + outring) = n; \
  /src/sys/arch/mips/rmi/
rmixl_firmware.h 143 uint32_t virt; member in struct:lib_cpu_tlb_mapping

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