| /src/sys/arch/arm/marvell/ |
| mvsocgppreg.h | 38 #define MVSOCGPP_GPIODO(p) ((((p) & 0x20) << 1) + 0x00)
40 #define MVSOCGPP_GPIODOEC(p) ((((p) & 0x20) << 1) + 0x04)
42 #define MVSOCGPP_GPIOBE(p) ((((p) & 0x20) << 1) + 0x08)
44 #define MVSOCGPP_GPIODIP(p) ((((p) & 0x20) << 1) + 0x0c)
46 #define MVSOCGPP_GPIODI(p) ((((p) & 0x20) << 1) + 0x10)
48 #define MVSOCGPP_GPIOIC(p) ((((p) & 0x20) << 1) + 0x14)
50 #define MVSOCGPP_GPIOIM(p) ((((p) & 0x20) << 1) + 0x18)
52 #define MVSOCGPP_GPIOILM(p) ((((p) & 0x20) << 1) + 0x1c)
|
| /src/share/locale/ctype/charset/ |
| Latin-Hebrew | 13 SPACE 0x09 - 0x0d 0x20
14 BLANK 0x09 0x20
15 PRINT 0x20 0x22 - 0x3e 0x5f 0x60 - 0x7a
16 SWIDTH1 0x20 - 0x7f
|
| Latin-6+ | 11 GRAPH 0x20 0x30 0x40 - 0x4f 0x60 - 0x6f
13 PUNCT 0x20 0x30
15 BLANK 0x20
16 PRINT 0x20 0x30 0x40 - 0x4f 0x60 - 0x6f
17 SWIDTH1 0x20 - 0x7f
|
| ASCII | 14 SPACE 0x09 - 0x0d 0x20
18 PRINT 0x20 - 0x7e
19 SWIDTH1 0x20 - 0x7e
|
| /src/sys/arch/luna68k/stand/boot/ |
| preset.h | 87 #define PS_PLAIN 0x20 /* 6: number of bitmap plain (unused) */
|
| /src/sys/arch/hpcmips/vr/ |
| vr4181ecureg.h | 37 #define ECU_SIZE 0x20 /* bus map size */
|
| /src/sys/dev/wsfont/ |
| spleen5x8.h | 55 0x20, /* ..*..... */
56 0x20, /* ..*..... */
57 0x20, /* ..*..... */
58 0x20, /* ..*..... */
59 0x20, /* ..*..... */
61 0x20, /* ..*..... */
82 0x20, /* ..*..... */
89 0x20, /* ..*..... */
94 0x20, /* ..*..... */
100 0x20, /* ..*..... *
[all...] |
| spleen6x12.h | 59 0x20, /* ..*..... */
60 0x20, /* ..*..... */
61 0x20, /* ..*..... */
62 0x20, /* ..*..... */
63 0x20, /* ..*..... */
64 0x20, /* ..*..... */
66 0x20, /* ..*..... */
97 0x20, /* ..*..... */
106 0x20, /* ..*..... */
115 0x20, /* ..*..... *
[all...] |
| /src/sys/arch/hp300/hp300/ |
| leds.h | 45 #define LED_DISK 0x20 /* for disk activity */
|
| /src/sys/arch/x68k/dev/ |
| mb86601reg.h | 45 #define PSNS_ATN 0x20
|
| /src/sys/dev/hil/ |
| hilkbdmap.h | 33 #define MAXHILKBDLAYOUT 0x20
|
| /src/sys/arch/hpcmips/conf/ |
| std.hpcmips.vr41 | 17 vrbcu* at vr4102ip? addr 0x0b000000 size 0x20
18 vrcmu* at vr4102ip? addr 0x0b000060 size 0x20
19 vrrtc* at vr4102ip? addr 0x0b0000c0 size 0x20 unit VRRTC
20 vrkiu* at vr4102ip? addr 0x0b000180 size 0x20 unit VRKIU
22 com* at vr4102ip? addr 0x0c000000 size 0x20 unit VRSIU pwctl PWCTL_COM0
23 vrgiu* at vr4102ip? addr 0x0b000100 size 0x20 unit VRGIU
24 vrpmu* at vr4102ip? addr 0x0b0000a0 size 0x20 unit VRPMU # power switch
26 vrpiu* at vr4102ip? addr 0x0b000120 size 0x20 addr2 0x0b0002a0 size2 0x20 unit VRPIU
30 vraiu* at vr4102ip? addr 0x0b000160 size 0x20 unit VRAIU pwctl PWCTL_SPEAKE
[all...] |
| /src/sys/arch/arm/sa11x0/ |
| sa11x0_comreg.h | 51 #define CR0_RCE 0x20 /* Receive clock edge enable */
65 #define CR3_LBM 0x20 /* Loopback mode */
80 #define SR0_EIF 0x20 /* Error in FIFO */
83 #define SACOM_SR1 0x20
89 #define SR1_ROR 0x20 /* Receive FIFO overrun */
|
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/ |
| omap4.h | 10 #define OMAP4_CLKCTRL_OFFSET 0x20
14 #define OMAP4_MPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
17 #define OMAP4_DSP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
20 #define OMAP4_L4_ABE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
41 #define OMAP4_L3_MAIN_1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
44 #define OMAP4_L3_MAIN_2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
49 #define OMAP4_IPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
52 #define OMAP4_DMA_SYSTEM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
55 #define OMAP4_DMM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
60 #define OMAP4_C2C_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
[all...] |
| /src/sys/dev/ic/ |
| oplreg.h | 40 #define OPL_STATUS_FT2 0x20
46 #define OPL_ENABLE_WAVE_SELECT 0x20
54 #define OPL_TIMER2_MASK 0x20
65 #define OPL_L_4OP_2 0x20
82 #define OPL_PERCUSSION_ENABLE 0x20
89 /* AM/VIB/EG/KSR/Multiple (0x20 to 0x35) */
90 #define OPL_AM_VIB 0x20
92 #define OPL_SUSTAIN 0x20
125 #define OPL_KEYON_BIT 0x20
135 #define OPL_VOICE_TO_RIGHT 0x20
[all...] |
| dl10019reg.h | 47 #define DL0_22_GPIO_MII_DIROUT 0x20 /* MII direction MAC->PHY */
|
| i8042reg.h | 9 #define KBS_TERR 0x20 /* kbd transmission error */
14 #define KBC_RAMREAD 0x20 /* read from RAM */
34 #define K_RDCMDBYTE 0x20
38 #define KC8_MDISABLE 0x20 /* disable mouse */
|
| /src/sys/arch/hpcmips/stand/lcboot/ |
| i28f128reg.h | 36 #define I28F128_WBUF_SIZE 0x20
51 #define I28F128_BLK_ERASE_1ST 0x20
59 #define I28F128_S_ERASE_ERROR 0x20
|
| /src/sys/crypto/chacha/ |
| chacha_selftest.c | 97 0xd3,0x13,0x20,0xbb, 0xd6,0xaa,0x6c,0xc8,
179 0x54,0x68,0x65,0x20, 0x64,0x68,0x6f,0x6c,
180 0x65,0x20,0x28,0x70, 0x72,0x6f,0x6e,0x6f,
181 0x75,0x6e,0x63,0x65, 0x64,0x20,0x22,0x64,
182 0x6f,0x6c,0x65,0x22, 0x29,0x20,0x69,0x73,
183 0x20,0x61,0x6c,0x73, 0x6f,0x20,0x6b,0x6e,
184 0x6f,0x77,0x6e,0x20, 0x61,0x73,0x20,0x74,
185 0x68,0x65,0x20,0x41, 0x73,0x69,0x61,0x74
[all...] |
| /src/sys/arch/alpha/pci/ |
| pci_sgmap_pte32.h | 35 #define SGMAP_PTE_SPACING 0x20
|
| /src/sys/arch/sh3/include/ |
| dacreg.h | 42 #define SH7709_DACR_DAE 0x20 /* D/A enable */
|
| /src/sys/arch/sparc/dev/ |
| apcreg.h | 29 #define APC_FANCTL_REG 0x20
|
| /src/sys/arch/sparc/sparc/ |
| auxiotwo.h | 39 * bit 5 (0x20) Power Failure Detect (1 = power fail)
46 #define AUXIOTWO_PFD 0x20 /* Power Failure Detect */
|
| /src/sys/arch/sun3/sun3/ |
| buserr.h | 37 #define BUSERR_TIMEOUT 0x20 /* Timeout error */
|
| enable.h | 40 #define ENA_SDVMA 0x20 /* Enable system DVMA */
|
