1 /* $NetBSD: adv_cardbus.c,v 1.31 2022/09/25 17:33:19 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * this file was brought from ahc_cardbus.c and adv_pci.c 35 * and modified by YAMAMOTO Takashi. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: adv_cardbus.c,v 1.31 2022/09/25 17:33:19 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/queue.h> 45 #include <sys/device.h> 46 47 #include <sys/bus.h> 48 #include <sys/intr.h> 49 50 #include <dev/scsipi/scsi_all.h> 51 #include <dev/scsipi/scsipi_all.h> 52 #include <dev/scsipi/scsiconf.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcidevs.h> 56 57 #include <dev/cardbus/cardbusvar.h> 58 #include <dev/pci/pcidevs.h> 59 60 #include <dev/ic/advlib.h> 61 #include <dev/ic/adv.h> 62 63 #define ADV_CARDBUS_IOBA PCI_BAR0 64 #define ADV_CARDBUS_MMBA PCI_BAR1 65 66 #define ADV_CARDBUS_DEBUG 67 #define ADV_CARDBUS_ALLOW_MEMIO 68 69 #define DEVNAME(sc) device_xname((sc)->sc_dev) 70 71 struct adv_cardbus_softc { 72 struct asc_softc sc_adv; /* real ADV */ 73 74 /* CardBus-specific goo. */ 75 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 76 pcitag_t sc_tag; 77 78 int sc_bar; 79 pcireg_t sc_csr; 80 bus_size_t sc_size; 81 }; 82 83 int adv_cardbus_match(device_t, cfdata_t, void *); 84 void adv_cardbus_attach(device_t, device_t, void *); 85 int adv_cardbus_detach(device_t, int); 86 87 CFATTACH_DECL_NEW(adv_cardbus, sizeof(struct adv_cardbus_softc), 88 adv_cardbus_match, adv_cardbus_attach, adv_cardbus_detach, NULL); 89 90 int 91 adv_cardbus_match(device_t parent, cfdata_t match, void *aux) 92 { 93 struct cardbus_attach_args *ca = aux; 94 95 if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS && 96 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADVSYS_ULTRA) 97 return (1); 98 99 return (0); 100 } 101 102 void 103 adv_cardbus_attach(device_t parent, device_t self, void *aux) 104 { 105 struct cardbus_attach_args *ca = aux; 106 struct adv_cardbus_softc *csc = device_private(self); 107 struct asc_softc *sc = &csc->sc_adv; 108 cardbus_devfunc_t ct = ca->ca_ct; 109 bus_space_tag_t iot; 110 bus_space_handle_t ioh; 111 pcireg_t reg; 112 u_int8_t latency = 0x20; 113 114 sc->sc_dev = self; 115 sc->sc_flags = 0; 116 117 if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) { 118 switch (PCI_PRODUCT(ca->ca_id)) { 119 case PCI_PRODUCT_ADVSYS_1200A: 120 aprint_normal(": AdvanSys ASC1200A SCSI adapter\n"); 121 latency = 0; 122 break; 123 124 case PCI_PRODUCT_ADVSYS_1200B: 125 aprint_normal(": AdvanSys ASC1200B SCSI adapter\n"); 126 latency = 0; 127 break; 128 129 case PCI_PRODUCT_ADVSYS_ULTRA: 130 switch (PCI_REVISION(ca->ca_class)) { 131 case ASC_PCI_REVISION_3050: 132 aprint_normal(": AdvanSys ABP-9xxUA " 133 "SCSI adapter\n"); 134 break; 135 136 case ASC_PCI_REVISION_3150: 137 aprint_normal(": AdvanSys ABP-9xxU " 138 "SCSI adapter\n"); 139 break; 140 } 141 break; 142 143 default: 144 aprint_error(": unknown model!\n"); 145 return; 146 } 147 } 148 149 csc->sc_ct = ct; 150 csc->sc_tag = ca->ca_tag; 151 152 /* 153 * Map the device. 154 */ 155 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 156 157 #ifdef ADV_CARDBUS_ALLOW_MEMIO 158 if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA, 159 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 160 &iot, &ioh, NULL, &csc->sc_size) == 0) { 161 #ifdef ADV_CARDBUS_DEBUG 162 printf("%s: memio enabled\n", DEVNAME(sc)); 163 #endif 164 csc->sc_bar = ADV_CARDBUS_MMBA; 165 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 166 } else 167 #endif 168 if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA, 169 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) { 170 #ifdef ADV_CARDBUS_DEBUG 171 printf("%s: io enabled\n", DEVNAME(sc)); 172 #endif 173 csc->sc_bar = ADV_CARDBUS_IOBA; 174 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 175 } else { 176 csc->sc_bar = 0; 177 aprint_error_dev(self, "unable to map device registers\n"); 178 return; 179 } 180 181 /* Enable the appropriate bits in the PCI CSR. */ 182 reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 183 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 184 reg |= csc->sc_csr; 185 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 186 187 /* 188 * Make sure the latency timer is set to some reasonable 189 * value. 190 */ 191 reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_BHLC_REG); 192 if (PCI_LATTIMER(reg) < latency) { 193 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 194 reg |= (latency << PCI_LATTIMER_SHIFT); 195 Cardbus_conf_write(ct, ca->ca_tag, PCI_BHLC_REG, reg); 196 } 197 198 ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); 199 ASC_SET_CHIP_STATUS(iot, ioh, 0); 200 201 sc->sc_iot = iot; 202 sc->sc_ioh = ioh; 203 sc->sc_dmat = ca->ca_dmat; 204 sc->pci_device_id = ca->ca_id; 205 sc->bus_type = ASC_IS_PCI; 206 sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); 207 208 /* 209 * Initialize the board 210 */ 211 if (adv_init(sc)) { 212 aprint_error_dev(self, "adv_init failed\n"); 213 return; 214 } 215 216 /* 217 * Establish the interrupt. 218 */ 219 sc->sc_ih = Cardbus_intr_establish(ct, IPL_BIO, adv_intr, sc); 220 if (sc->sc_ih == NULL) { 221 aprint_error_dev(self, "unable to establish interrupt\n"); 222 return; 223 } 224 225 /* 226 * Attach. 227 */ 228 adv_attach(sc); 229 } 230 231 int 232 adv_cardbus_detach(device_t self, int flags) 233 { 234 struct adv_cardbus_softc *csc = device_private(self); 235 struct asc_softc *sc = &csc->sc_adv; 236 237 int rv; 238 239 rv = adv_detach(sc, flags); 240 if (rv) 241 return rv; 242 243 if (sc->sc_ih) { 244 Cardbus_intr_disestablish(csc->sc_ct, sc->sc_ih); 245 sc->sc_ih = 0; 246 } 247 248 if (csc->sc_bar != 0) { 249 Cardbus_mapreg_unmap(csc->sc_ct, csc->sc_bar, 250 sc->sc_iot, sc->sc_ioh, csc->sc_size); 251 csc->sc_bar = 0; 252 } 253 254 return 0; 255 } 256
Indexes created Sun Oct 25 00:26:45 UTC 2026