| /src/external/gpl3/gdb/dist/sim/ppc/ |
| idecode_branch.h | 21 /* branch macro's:
44 /* take the branch - absolute or relative - possibly updating the link
47 #define BRANCH(ADDRESS) \
59 ("BRANCH - update_AA=%d update_LK=%d nia=0x%x cia=0x%x\n", \
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| idecode_branch.h | 21 /* branch macro's:
44 /* take the branch - absolute or relative - possibly updating the link
47 #define BRANCH(ADDRESS) \
59 ("BRANCH - update_AA=%d update_LK=%d nia=0x%x cia=0x%x\n", \
|
| /src/external/apache2/llvm/dist/clang/INPUTS/ |
| cfg-long-chain1.c | 1 #define EXPAND_2_BRANCHES(i, x, y) BRANCH(i, x, y); BRANCH(i + 1, x, y);
16 #define BRANCH(i, x, y) if ((x % 13171) < i) { int var = x / 13171; y ^= var; }
18 #undef BRANCH
|
| cfg-long-chain2.c | 1 #define EXPAND_2_BRANCHES(i, x, y) BRANCH(i, x, y); BRANCH(i + 1, x, y);
16 #define BRANCH(i, x, y) if (((x % 13171) + ++y) < i) { int var = x / 13171 + y; return var; }
18 #undef BRANCH
|
| cfg-long-chain3.c | 1 #define EXPAND_2_BRANCHES(i, x, y) BRANCH(i, x, y); BRANCH(i + 1, x, y);
16 #define BRANCH(i, x, y) if ((x % 13171) < i) { int var = x / 13171; y ^= var; } else
18 #undef BRANCH
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| mips-formats.h | 132 #define BRANCH(SIZE, LSB, SHIFT) \
|
| arc-tbl.h | 1454 { "b", 0x00010000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A16_5 }, { C_D }},
1457 { "b", 0x00000000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A16_5 }, { C_CC, C_D }},
1595 { "beq_s", 0x0000F200, 0x0000FE00, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM10_A16_7_S }, { C_CC_EQ }},
1598 { "bge_s", 0x0000F640, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GE }},
1601 { "bgt_s", 0x0000F600, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GT }},
1604 { "bhi_s", 0x0000F700, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HI }},
1607 { "bhs_s", 0x0000F740, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HS }},
1685 { "bl", 0x08020000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A32_5 }, { C_D }},
1688 { "bl", 0x08000000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A32_5 }, { C_CC, C_D }},
1691 { "ble_s", 0x0000F6C0, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_LE }}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| mips-formats.h | 132 #define BRANCH(SIZE, LSB, SHIFT) \
|
| arc-tbl.h | 1454 { "b", 0x00010000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A16_5 }, { C_D }},
1457 { "b", 0x00000000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A16_5 }, { C_CC, C_D }},
1595 { "beq_s", 0x0000F200, 0x0000FE00, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM10_A16_7_S }, { C_CC_EQ }},
1598 { "bge_s", 0x0000F640, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GE }},
1601 { "bgt_s", 0x0000F600, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GT }},
1604 { "bhi_s", 0x0000F700, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HI }},
1607 { "bhs_s", 0x0000F740, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HS }},
1685 { "bl", 0x08020000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A32_5 }, { C_D }},
1688 { "bl", 0x08000000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A32_5 }, { C_CC, C_D }},
1691 { "ble_s", 0x0000F6C0, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_LE }}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| mips-formats.h | 132 #define BRANCH(SIZE, LSB, SHIFT) \
|
| arc-tbl.h | 1454 { "b", 0x00010000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A16_5 }, { C_D }},
1457 { "b", 0x00000000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A16_5 }, { C_CC, C_D }},
1595 { "beq_s", 0x0000F200, 0x0000FE00, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM10_A16_7_S }, { C_CC_EQ }},
1598 { "bge_s", 0x0000F640, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GE }},
1601 { "bgt_s", 0x0000F600, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GT }},
1604 { "bhi_s", 0x0000F700, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HI }},
1607 { "bhs_s", 0x0000F740, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HS }},
1685 { "bl", 0x08020000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A32_5 }, { C_D }},
1688 { "bl", 0x08000000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A32_5 }, { C_CC, C_D }},
1691 { "ble_s", 0x0000F6C0, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_LE }}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| mips-formats.h | 132 #define BRANCH(SIZE, LSB, SHIFT) \
|
| arc-tbl.h | 1454 { "b", 0x00010000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A16_5 }, { C_D }},
1457 { "b", 0x00000000, 0xF8010000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A16_5 }, { C_CC, C_D }},
1595 { "beq_s", 0x0000F200, 0x0000FE00, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM10_A16_7_S }, { C_CC_EQ }},
1598 { "bge_s", 0x0000F640, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GE }},
1601 { "bgt_s", 0x0000F600, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_GT }},
1604 { "bhi_s", 0x0000F700, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HI }},
1607 { "bhs_s", 0x0000F740, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_HS }},
1685 { "bl", 0x08020000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM25_A32_5 }, { C_D }},
1688 { "bl", 0x08000000, 0xF8030000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, NONE, { SIMM21_A32_5 }, { C_CC, C_D }},
1691 { "ble_s", 0x0000F6C0, 0x0000FFC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, BRANCH, COND, { SIMM7_A16_10_S }, { C_CC_LE }}
[all...] |
| /src/external/gpl3/gdb/dist/sim/microblaze/ |
| microblaze.h | 85 #define BRANCH branch_taken = 1
|
| /src/external/gpl3/gdb.old/dist/sim/microblaze/ |
| microblaze.h | 85 #define BRANCH branch_taken = 1
|
| /src/usr.bin/sed/ |
| defs.h | 119 BRANCH, /* b t */
|
| /src/external/gpl3/binutils/dist/include/opcode/ |
| d10v.h | 52 #define SHORT_B 3 /* short with 8-bit branch */
53 #define LONG_B 8 /* long with 16-bit branch */
85 #define BRANCH 512 /* branch, no link */
|
| arc.h | 52 BRANCH,
|
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| d10v.h | 52 #define SHORT_B 3 /* short with 8-bit branch */
53 #define LONG_B 8 /* long with 16-bit branch */
85 #define BRANCH 512 /* branch, no link */
|
| /src/external/gpl3/gdb/dist/include/opcode/ |
| d10v.h | 52 #define SHORT_B 3 /* short with 8-bit branch */
53 #define LONG_B 8 /* long with 16-bit branch */
85 #define BRANCH 512 /* branch, no link */
|
| /src/external/gpl3/gdb.old/dist/include/opcode/ |
| d10v.h | 52 #define SHORT_B 3 /* short with 8-bit branch */
53 #define LONG_B 8 /* long with 16-bit branch */
85 #define BRANCH 512 /* branch, no link */
|
| /src/lib/libcompat/regexp/ |
| regexp.c | 73 * all nodes except BRANCH implement concatenation; a "next" pointer with
74 * a BRANCH on both ends of it is connecting two alternatives. (Here we
75 * have one of the subtle syntax dependencies: an individual BRANCH (as
79 * particular, the operand of a BRANCH node is the first node of the branch.
80 * (NB this is *not* a tree structure: the tail of the branch connects
91 #define BRANCH 6 /* node Match this alternative, or the next... */
106 * BRANCH The set of branches constituting a single choice are hooked
108 * anything being concatenated to any individual branch. The
109 * "next" pointer of the last BRANCH in a choice points to th
[all...] |
| /src/external/bsd/less/dist/ |
| regexp.c | 69 * all nodes except BRANCH implement concatenation; a "next" pointer with
70 * a BRANCH on both ends of it is connecting two alternatives. (Here we
71 * have one of the subtle syntax dependencies: an individual BRANCH (as
75 * particular, the operand of a BRANCH node is the first node of the branch.
76 * (NB this is *not* a tree structure: the tail of the branch connects
88 #define BRANCH 6 /* node Match this alternative, or the next... */
101 * BRANCH The set of branches constituting a single choice are hooked
103 * anything being concatenated to any individual branch. The
104 * "next" pointer of the last BRANCH in a choice points to th
[all...] |
| /src/external/gpl3/binutils/dist/bfd/ |
| coff-sh.c | 1550 /* This instruction is a branch. */
1551 #define BRANCH (0x4)
1622 { 0x000b, BRANCH | DELAY | USESSP }, /* rts */
1627 { 0x002b, BRANCH | DELAY | SETSSP }, /* rte */
1635 { 0x0003, BRANCH | DELAY | USES1 | SETSSP }, /* bsrf rn */
1638 { 0x0023, BRANCH | DELAY | USES1 }, /* braf rn */
1739 { 0x400b, BRANCH | DELAY | USES1 }, /* jsr @rn */
1759 { 0x402b, BRANCH | DELAY | USES1 }, /* jmp @rn */
1852 { 0x8900, BRANCH | USESSP }, /* bt label */
1853 { 0x8b00, BRANCH | USESSP }, /* bf label *
[all...] |
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-ns32k.c | 322 #define BRANCH 1
347 {(63), (-64), 1, IND (BRANCH, WORD)},
348 {(8192), (-8192), 2, IND (BRANCH, DOUBLE)},
968 IND (BRANCH, BYTE),
1000 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 0);
1007 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 1);
1845 IND (BRANCH, UNDEF), /* Expecting
2026 case IND (BRANCH, BYTE):
2029 case IND (BRANCH, WORD):
2032 case IND (BRANCH, DOUBLE)
[all...] |
