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Searched defs:IMM8 (Results 1 - 23 of 23) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
m10200-opc.c	`64 #define IMM8 (AM1+1) 69 #define IMM16 (IMM8+1) 282 { "and", 0xf50000, 0xfffc00, FMT_5, {IMM8, DN0}}, 286 { "or", 0xf50800, 0xfffc00, FMT_5, {IMM8, DN0}}, 298 { "btst", 0xf50400, 0xfffc00, FMT_5, {IMM8, DN0}},`
ia64-opc.h	`105 #define IMM8 IA64_OPND_IMM8`
m10300-opc.c	82 #define IMM8 (AM2+1) 87 #define IMM16 (IMM8+1) 454 { "mov", 0x9000, 0xf000, 0, FMT_S1, 0, {IMM8, AN01}}, 474 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}}, 477 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}}, 484 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}}, 487 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}}, 526 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}}, 528 { "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}}, 569 { "mov", 0xfbf80000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, XRN02}} [all...]
ppc-opc.c	`3996 /* The 8-bit IMM8 field in a XX1 form instruction. */ 3997 #define IMM8 P2 + 1 4000 #define VX_OFF IMM8 + 1 9488 {"xxspltib", X(60,360), XX1_MASK\|3<<19, PPCVSX3, PPCVLE, {XT6, IMM8}},`
/src/external/gpl3/binutils.old/dist/opcodes/
m10200-opc.c	`64 #define IMM8 (AM1+1) 69 #define IMM16 (IMM8+1) 282 { "and", 0xf50000, 0xfffc00, FMT_5, {IMM8, DN0}}, 286 { "or", 0xf50800, 0xfffc00, FMT_5, {IMM8, DN0}}, 298 { "btst", 0xf50400, 0xfffc00, FMT_5, {IMM8, DN0}},`
ia64-opc.h	`105 #define IMM8 IA64_OPND_IMM8`
m10300-opc.c	82 #define IMM8 (AM2+1) 87 #define IMM16 (IMM8+1) 454 { "mov", 0x9000, 0xf000, 0, FMT_S1, 0, {IMM8, AN01}}, 474 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}}, 477 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}}, 484 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}}, 487 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}}, 526 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}}, 528 { "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}}, 569 { "mov", 0xfbf80000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, XRN02}} [all...]
ppc-opc.c	`3995 /* The 8-bit IMM8 field in a XX1 form instruction. */ 3996 #define IMM8 P2 + 1 3999 #define VX_OFF IMM8 + 1 9423 {"xxspltib", X(60,360), XX1_MASK\|3<<19, PPCVSX3, PPCVLE, {XT6, IMM8}},`
/src/external/gpl3/gdb/dist/opcodes/
m10200-opc.c	`64 #define IMM8 (AM1+1) 69 #define IMM16 (IMM8+1) 282 { "and", 0xf50000, 0xfffc00, FMT_5, {IMM8, DN0}}, 286 { "or", 0xf50800, 0xfffc00, FMT_5, {IMM8, DN0}}, 298 { "btst", 0xf50400, 0xfffc00, FMT_5, {IMM8, DN0}},`
ia64-opc.h	`105 #define IMM8 IA64_OPND_IMM8`
m10300-opc.c	82 #define IMM8 (AM2+1) 87 #define IMM16 (IMM8+1) 454 { "mov", 0x9000, 0xf000, 0, FMT_S1, 0, {IMM8, AN01}}, 474 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}}, 477 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}}, 484 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}}, 487 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}}, 526 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}}, 528 { "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}}, 569 { "mov", 0xfbf80000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, XRN02}} [all...]
ppc-opc.c	`3913 /* The 8-bit IMM8 field in a XX1 form instruction. */ 3914 #define IMM8 P2 + 1 3917 #define VX_OFF IMM8 + 1 9304 {"xxspltib", X(60,360), XX1_MASK\|3<<19, PPCVSX3, PPCVLE, {XT6, IMM8}},`
/src/external/gpl3/gdb.old/dist/opcodes/
m10200-opc.c	`64 #define IMM8 (AM1+1) 69 #define IMM16 (IMM8+1) 282 { "and", 0xf50000, 0xfffc00, FMT_5, {IMM8, DN0}}, 286 { "or", 0xf50800, 0xfffc00, FMT_5, {IMM8, DN0}}, 298 { "btst", 0xf50400, 0xfffc00, FMT_5, {IMM8, DN0}},`
ia64-opc.h	`105 #define IMM8 IA64_OPND_IMM8`
m10300-opc.c	82 #define IMM8 (AM2+1) 87 #define IMM16 (IMM8+1) 454 { "mov", 0x9000, 0xf000, 0, FMT_S1, 0, {IMM8, AN01}}, 474 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}}, 477 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}}, 484 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}}, 487 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}}, 526 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}}, 528 { "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}}, 569 { "mov", 0xfbf80000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, XRN02}} [all...]
ppc-opc.c	`3913 /* The 8-bit IMM8 field in a XX1 form instruction. */ 3914 #define IMM8 P2 + 1 3917 #define VX_OFF IMM8 + 1 9304 {"xxspltib", X(60,360), XX1_MASK\|3<<19, PPCVSX3, PPCVLE, {XT6, IMM8}},`
/src/external/gpl3/gdb/dist/sim/pru/
pru.h	`68 #define IMM8 GET_INSN_FIELD (IMM8, inst)`
/src/external/gpl3/gdb.old/dist/sim/pru/
pru.h	`68 #define IMM8 GET_INSN_FIELD (IMM8, inst)`
/src/sys/external/bsd/sljit/dist/sljit_src/
sljitNativeARM_T2_32.c	`59 #define IMM8(imm) (imm) 560 return push_inst16(compiler, ADDSI8 \| IMM8(imm) \| RDN3(dst)); 562 return push_inst16(compiler, SUBSI8 \| IMM8(nimm) \| RDN3(dst)); 597 return push_inst16(compiler, SUBSI8 \| IMM8(imm) \| RDN3(dst)); 599 return push_inst16(compiler, ADDSI8 \| IMM8(nimm) \| RDN3(dst)); 602 return push_inst16(compiler, CMPI \| IMM8(imm) \| RDN3(reg));`
/src/external/gpl3/binutils/dist/include/opcode/
h8300.h	127 IMM8 = IMM \| SRC \| L_8, 276 #define IMM8LIST IMM8, DATA 846 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDIND, E}}, {{0x7, 0xd, B30 \| RDIND, IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 847 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTINC, E}}, {{PREFIX_0174, 0x6, 0xc, B30 \| RDPOSTINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 848 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTDEC, E}}, {{PREFIX_0176, 0x6, 0xc, B30 \| RDPOSTDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 849 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREINC, E}}, {{PREFIX_0175, 0x6, 0xc, B30 \| RDPREINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 850 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREDEC, E}}, {{PREFIX_0177, 0x6, 0xc, B30 \| RDPREDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 851 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP2DST, E}}, {{PREFIX_017_D2D, 0x6, 0x8, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 852 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP16DST, E}}, {{PREFIX_0174, 0x6, 0xe, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, DSTDISP16LIST, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 853 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP32DST, E}}, {{PREFIX_78R4WD, 0x6, 0xa, 2, B31 \| B20 \| IGNORE, DSTDISP32LIST, (…) [all...]
/src/external/gpl3/binutils.old/dist/include/opcode/
h8300.h	127 IMM8 = IMM \| SRC \| L_8, 276 #define IMM8LIST IMM8, DATA 846 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDIND, E}}, {{0x7, 0xd, B30 \| RDIND, IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 847 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTINC, E}}, {{PREFIX_0174, 0x6, 0xc, B30 \| RDPOSTINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 848 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTDEC, E}}, {{PREFIX_0176, 0x6, 0xc, B30 \| RDPOSTDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 849 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREINC, E}}, {{PREFIX_0175, 0x6, 0xc, B30 \| RDPREINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 850 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREDEC, E}}, {{PREFIX_0177, 0x6, 0xc, B30 \| RDPREDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 851 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP2DST, E}}, {{PREFIX_017_D2D, 0x6, 0x8, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 852 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP16DST, E}}, {{PREFIX_0174, 0x6, 0xe, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, DSTDISP16LIST, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 853 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP32DST, E}}, {{PREFIX_78R4WD, 0x6, 0xa, 2, B31 \| B20 \| IGNORE, DSTDISP32LIST, (…) [all...]
/src/external/gpl3/gdb/dist/include/opcode/
h8300.h	127 IMM8 = IMM \| SRC \| L_8, 276 #define IMM8LIST IMM8, DATA 846 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDIND, E}}, {{0x7, 0xd, B30 \| RDIND, IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 847 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTINC, E}}, {{PREFIX_0174, 0x6, 0xc, B30 \| RDPOSTINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 848 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTDEC, E}}, {{PREFIX_0176, 0x6, 0xc, B30 \| RDPOSTDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 849 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREINC, E}}, {{PREFIX_0175, 0x6, 0xc, B30 \| RDPREINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 850 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREDEC, E}}, {{PREFIX_0177, 0x6, 0xc, B30 \| RDPREDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 851 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP2DST, E}}, {{PREFIX_017_D2D, 0x6, 0x8, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 852 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP16DST, E}}, {{PREFIX_0174, 0x6, 0xe, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, DSTDISP16LIST, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 853 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP32DST, E}}, {{PREFIX_78R4WD, 0x6, 0xa, 2, B31 \| B20 \| IGNORE, DSTDISP32LIST, (…) [all...]
/src/external/gpl3/gdb.old/dist/include/opcode/
h8300.h	127 IMM8 = IMM \| SRC \| L_8, 276 #define IMM8LIST IMM8, DATA 846 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDIND, E}}, {{0x7, 0xd, B30 \| RDIND, IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 847 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTINC, E}}, {{PREFIX_0174, 0x6, 0xc, B30 \| RDPOSTINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 848 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPOSTDEC, E}}, {{PREFIX_0176, 0x6, 0xc, B30 \| RDPOSTDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 849 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREINC, E}}, {{PREFIX_0175, 0x6, 0xc, B30 \| RDPREINC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 850 {CODE, AV_H8SX, 0, NAME, {{IMM8, RDPREDEC, E}}, {{PREFIX_0177, 0x6, 0xc, B30 \| RDPREDEC, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 851 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP2DST, E}}, {{PREFIX_017_D2D, 0x6, 0x8, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 852 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP16DST, E}}, {{PREFIX_0174, 0x6, 0xe, B30 \| DSTDISPREG, B31 \| B20 \| IGNORE, DSTDISP16LIST, OP1, BIT \| IGNORE, IMM8LIST, E}}}, \ 853 {CODE, AV_H8SX, 0, NAME, {{IMM8, DISP32DST, E}}, {{PREFIX_78R4WD, 0x6, 0xa, 2, B31 \| B20 \| IGNORE, DSTDISP32LIST, (…) [all...]

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