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    Searched defs:Imm12 (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp 175 /// getAddrModeImm12OpValue - Return encoding info for 'reg +/- imm12'
279 /// getAddrModeThumbSPOpValue - Return encoding info for 'reg +/- imm12'
972 /// getAddrModeImm12OpValue - Return encoding info for 'reg +/- imm12' operand.
979 // {11-0} = imm12
980 unsigned Reg = 0, Imm12 = 0;
987 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups, STI);
1017 Imm12 = Offset;
1019 uint32_t Binary = Imm12 & 0xfff;
1285 // {13} 1 == imm12, 0 == Rm
1287 // {11-0} imm12/R
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  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp 6659 const unsigned Imm12 = fieldFromInstruction(Insn, 26, 1) << 11 |
6669 // T3 does a zext of imm12, where T2 does a ThumbExpandImm (T2SOImm)
6677 Inst.addOperand(MCOperand::createImm(Imm12)); // zext imm12
6680 if (!Check(DS, DecodeT2SOImm(Inst, Imm12, Address, Decoder))) // imm12

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