| /src/sys/arch/arm/arm32/ |
| db_machdep.c | 84 #define XO(f) ((long *)(offsetof(db_regs_t, f) / sizeof(register_t)))
86 { "spsr", XO(tf_spsr), ddb_reg_var, NULL },
87 { "r0", XO(tf_r0), ddb_reg_var, NULL },
88 { "r1", XO(tf_r1), ddb_reg_var, NULL },
89 { "r2", XO(tf_r2), ddb_reg_var, NULL },
90 { "r3", XO(tf_r3), ddb_reg_var, NULL },
91 { "r4", XO(tf_r4), ddb_reg_var, NULL },
92 { "r5", XO(tf_r5), ddb_reg_var, NULL },
93 { "r6", XO(tf_r6), ddb_reg_var, NULL },
94 { "r7", XO(tf_r7), ddb_reg_var, NULL }
[all...] |
| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 3397 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
3451 /* The RB field in an X, XO, M, or MDS form instruction. */
3475 instruction or the RT field in a D, DS, X, XFX or XO form
3786 /* The L field in a XO form instruction. */
4910 /* An XO form instruction. */
4911 #define XO(op, xop, oe, rc) \
4916 #define XO_MASK XO (0x3f, 0x1ff, 1, 1)
4917 #define XOL_MASK XO (0x3f, 0x1ff, 0, 1)
5262 {"machhwu", XO (4, 12,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
5265 {"machhwu.", XO (4, 12,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 3397 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
3451 /* The RB field in an X, XO, M, or MDS form instruction. */
3475 instruction or the RT field in a D, DS, X, XFX or XO form
3786 /* The L field in a XO form instruction. */
4894 /* An XO form instruction. */
4895 #define XO(op, xop, oe, rc) \
4900 #define XO_MASK XO (0x3f, 0x1ff, 1, 1)
4901 #define XOL_MASK XO (0x3f, 0x1ff, 0, 1)
5245 {"machhwu", XO (4, 12,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
5248 {"machhwu.", XO (4, 12,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 3319 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
3373 /* The RB field in an X, XO, M, or MDS form instruction. */
3397 instruction or the RT field in a D, DS, X, XFX or XO form
3708 /* The L field in a XO form instruction. */
4775 /* An XO form instruction. */
4776 #define XO(op, xop, oe, rc) \
4781 #define XO_MASK XO (0x3f, 0x1ff, 1, 1)
4782 #define XOL_MASK XO (0x3f, 0x1ff, 0, 1)
5126 {"machhwu", XO (4, 12,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
5129 {"machhwu.", XO (4, 12,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 3319 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
3373 /* The RB field in an X, XO, M, or MDS form instruction. */
3397 instruction or the RT field in a D, DS, X, XFX or XO form
3708 /* The L field in a XO form instruction. */
4775 /* An XO form instruction. */
4776 #define XO(op, xop, oe, rc) \
4781 #define XO_MASK XO (0x3f, 0x1ff, 1, 1)
4782 #define XOL_MASK XO (0x3f, 0x1ff, 0, 1)
5126 {"machhwu", XO (4, 12,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
5129 {"machhwu.", XO (4, 12,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}
[all...] |
