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Searched
defs:XW
(Results
1 - 4
of
4
) sorted by relevancy
/src/external/gpl3/binutils/dist/opcodes/
ppc-opc.c
4972
/* An
XW
form instruction. */
4973
#define
XW
(op, xop, rc) \
4978
#define XW_MASK
XW
(0x3f, 0x3f, 0)
5243
{"psq_lx",
XW
(4, 6,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5249
{"psq_stx",
XW
(4, 7,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
5336
{"psq_lux",
XW
(4, 38,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5338
{"psq_stux",
XW
(4, 39,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
/src/external/gpl3/binutils.old/dist/opcodes/
ppc-opc.c
4956
/* An
XW
form instruction. */
4957
#define
XW
(op, xop, rc) \
4962
#define XW_MASK
XW
(0x3f, 0x3f, 0)
5226
{"psq_lx",
XW
(4, 6,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5232
{"psq_stx",
XW
(4, 7,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
5318
{"psq_lux",
XW
(4, 38,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5320
{"psq_stux",
XW
(4, 39,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
/src/external/gpl3/gdb/dist/opcodes/
ppc-opc.c
4837
/* An
XW
form instruction. */
4838
#define
XW
(op, xop, rc) \
4843
#define XW_MASK
XW
(0x3f, 0x3f, 0)
5107
{"psq_lx",
XW
(4, 6,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5113
{"psq_stx",
XW
(4, 7,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
5199
{"psq_lux",
XW
(4, 38,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5201
{"psq_stux",
XW
(4, 39,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
/src/external/gpl3/gdb.old/dist/opcodes/
ppc-opc.c
4837
/* An
XW
form instruction. */
4838
#define
XW
(op, xop, rc) \
4843
#define XW_MASK
XW
(0x3f, 0x3f, 0)
5107
{"psq_lx",
XW
(4, 6,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5113
{"psq_stx",
XW
(4, 7,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
5199
{"psq_lux",
XW
(4, 38,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}},
5201
{"psq_stux",
XW
(4, 39,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}},
Completed in 37 milliseconds
Indexes created Wed Mar 04 15:26:31 UTC 2026