| /src/sys/arch/hpc/stand/hpcboot/ |
| framebuffer.cpp | 49 // get current bpp.
51 int bpp = GetDeviceCaps(hdc, BITSPIXEL); local
61 if (tab->bpp == bpp) {
82 _default.bpp = bpp;
100 switch(_fb->bpp) {
|
| framebuffer.h | 36 int bpp, width, height, linebytes; member in struct:FrameBufferInfo::framebuffer_info
52 int bpp(void) { return _fb->bpp; } function in class:FrameBufferInfo
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/ |
| amdgpu_rc_calc_dpi.c | 114 float bpp = ((float) pps->bits_per_pixel / 16.0); local
121 double d_bytes_per_pixel = dsc_ceil(bpp * slice_width / 8.0) / slice_width;
129 /* in native_422 or native_420 modes, the bits_per_pixel is double the target bpp
133 bpp /= 2.0;
135 calc_rc_params(&rc, mode, bpc, bpp, slice_width, slice_height, pps->dsc_version_minor);
|
| rc_calc.h | 76 float bpp; member in struct:qp_entry
82 void calc_rc_params(struct rc_params *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, int slice_width, int slice_height, int minor_version);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dsi.c | 16 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
18 if (WARN_ON(bpp < 0))
19 bpp = 16;
21 return intel_dsi->pclk * bpp / intel_dsi->lane_count;
|
| vlv_dsi_pll.c | 52 u32 bpp = mipi_dsi_pixel_format_to_bpp(fmt); local
56 dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count);
264 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
318 pclk = DIV_ROUND_CLOSEST(dsi_clock * intel_dsi->lane_count, bpp);
331 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
339 pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);
|
| intel_dp_mst.c | 60 int bpp, slots = -EINVAL; local
65 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
66 crtc_state->pipe_bpp = bpp;
|
| /src/usr.sbin/installboot/arch/ |
| landisk.c | 68 struct landisk_boot_params bp, *bpp; local
204 bpp = (void *)(bootstrapbuf + 512 * 2 + 8);
205 bplen = le32toh(bpp->bp_length);
211 memcpy(&bp, bpp, bplen);
221 memcpy(bpp, &bp, bplen);
|
| i386.c | 203 show_i386_boot_params(struct x86_boot_params *bpp)
208 printf("timeout %d, ", le32toh(bpp->bp_timeout));
209 printf("flags %x, ", le32toh(bpp->bp_flags));
210 printf("speed %d, ", le32toh(bpp->bp_conspeed));
211 printf("ioaddr %x, ", le32toh(bpp->bp_consaddr));
213 if (consoles[i].dev == (int)le32toh(bpp->bp_consdev))
217 printf("console %d\n", le32toh(bpp->bp_consdev));
220 if (bpp->bp_keymap[0])
221 printf(" keymap %s\n", bpp->bp_keymap);
231 update_i386_boot_params(ib_params *params, struct x86_boot_params *bpp)
506 struct x86_boot_params *bpp; local
[all...] |
| /src/sys/ufs/lfs/ |
| lfs_debug.c | 284 struct buf **bpp; local
288 blkno = (*(sp->bpp))->b_blkno;
289 for (bpp = sp->bpp; bpp < sp->cbpp; bpp++) {
290 if ((*bpp)->b_blkno != blkno) {
291 if ((*bpp)->b_vp == devvp) {
294 (*bpp)->b_blkno,
302 VTOI((*bpp)->b_vp)->i_number
[all...] |
| lfs_kernel.h | 75 struct buf **bpp; /* Array of kept buffers */ member in struct:lfs_cluster
|
| /src/external/bsd/byacc/dist/ |
| symtab.c | 70 bucket *bp, **bpp; local
72 bpp = symbol_table + hash(name);
73 bp = *bpp;
79 bpp = &bp->link;
80 bp = *bpp;
83 *bpp = bp = make_bucket(name);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| fb_decoder.c | 49 int bpp; /* Bits per pixel, 0 indicates invalid */ member in struct:pixel_format
62 /* non-supported format has bpp default to 0 */
82 /* non-supported format has bpp default to 0 */
152 u32 tiled, int stride_mask, int bpp)
171 if (bpp == 8)
173 else if (bpp == 16 || bpp == 32 || bpp == 64)
176 gvt_dbg_core("skl: unsupported bpp:%d\n", bpp);
287 u8 bpp; \/* Bits per pixel; 0 indicates invalid *\/ member in struct:cursor_mode_format
[all...] |
| fb_decoder.h | 109 u8 bpp; /* bits per pixel */ member in struct:intel_vgpu_primary_plane_format
124 u8 bpp; /* bits per pixel */ member in struct:intel_vgpu_sprite_plane_format
141 u8 bpp; /* bits per pixel */ member in struct:intel_vgpu_cursor_plane_format
|
| /src/external/gpl3/gdb/dist/sim/bfin/ |
| dv-bfin_ppi.c | 66 int bpp; local
72 bpp = bfin_gui_color_depth (ppi->color);
75 (ppi->count + 1) / (bpp / 8),
|
| /src/external/gpl3/gdb.old/dist/sim/bfin/ |
| dv-bfin_ppi.c | 66 int bpp; local
72 bpp = bfin_gui_color_depth (ppi->color);
75 (ppi->count + 1) / (bpp / 8),
|
| /src/sys/dev/pci/ |
| if_ntwoc_pci.c | 558 u_int bpp; local
570 bpp = sc->sc_numports * (NTWOC_NtxBUFS + NTWOC_NrxBUFS);
572 allocsize = bpp * (SCA_BSIZE + sizeof (sca_desc_t));
583 if (bpp * sizeof (sca_desc_t) > 64 * 1024)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_mem_input_v.c | 527 { 64, 512, 1, 8, 0, 1, 0, 0, 0}, /* new for 64bpp from HW */
541 } bpp; local
544 bpp = bpp_32;
546 bpp = chroma ? bpp_16 : bpp_8;
548 bpp = bpp_8;
554 return dvmm_Hw_Setting_1DTiling[bpp];
560 return dvmm_Hw_Setting_2DTiling[bpp];
563 return dvmm_Hw_Setting_Linear[bpp];
565 return dvmm_Hw_Setting_2DTiling[bpp];
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_arb.c | 50 int bpp; member in struct:nv_sim_state
61 int pagemiss, cas, bpp; local
73 bpp = arb->bpp;
89 crtc_drain_rate = pclk_freq * bpp / 8;
99 p1 = p1 * bpp / 8;
129 drain_rate = pclk_freq * arb->bpp / 8; /* kB/s */
166 + (arb->bpp == 32 ? 8 : 4); /* Margin of error. */
198 nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
212 sim_data.bpp = bpp
[all...] |
| /src/sys/arch/hpcmips/dev/ |
| plumvideo.c | 97 /* clut buffer (8bpp only) */
312 int bpp, width, height, vram_pitch; local
333 bpp = 16;
348 bpp = 8;
351 chip->vc_fbdepth = bpp;
365 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY;
375 switch (bpp) {
380 printf("8bpp ");
393 printf("16bpp ");
401 vram_size = (width * height * bpp) / NBBY
[all...] |
| /src/sys/arch/luna68k/dev/ |
| lunafb.c | 402 * On 1bpp framebuffer, only plane P0 has framebuffer memory
446 * Set ANSI 16 colors. We only supports 4bpp console right
461 int bpp, i; local
470 bpp = 8; /* XXX check monochrome bit in DIPSW */
474 bpp = 4; /* XXX check monochrome bit in DIPSW */
477 bpp = 1;
482 dc->dc_depth = bpp;
484 dc->dc_cmsize = (bpp == 1) ? 0 : 1 << bpp;
514 if (bpp == 4 || bpp == 8
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_mem_input.c | 45 unsigned int bpp; member in struct:pte_setting
76 { 64, 512, 1, 8, 0, 1, 0, 0, 0}, /* new for 64bpp from HW */
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_dp_mst.c | 522 int bpp = 24; local
526 mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false);
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/io/ |
| displif.h | 446 * | bpp | 28
476 * bpp - uint32_t, bits per pixel
505 uint32_t bpp; member in struct:xendispl_dbuf_create_req
677 * | bpp | 40
697 * bpp - uint32_t, bits per pixel
706 uint32_t bpp; member in struct:xendispl_set_config_req
|
| /src/external/mit/xorg/lib/libxcb/files/ |
| dri3.h | 120 uint8_t bpp; member in struct:xcb_dri3_pixmap_from_buffer_request_t
156 uint8_t bpp; member in struct:xcb_dri3_buffer_from_pixmap_reply_t
227 uint8_t bpp; member in struct:xcb_dri3_get_supported_modifiers_request_t
269 uint8_t bpp; member in struct:xcb_dri3_pixmap_from_buffers_request_t
307 uint8_t bpp; member in struct:xcb_dri3_buffers_from_pixmap_reply_t
506 uint8_t bpp,
526 uint8_t bpp,
699 uint8_t bpp);
716 uint8_t bpp);
782 uint8_t bpp,
[all...] |
