| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | amdgpu_rv2_clk_mgr.c | 42 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) argument
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| H A D | rv1_clk_mgr_clk.c | 59 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rv1_dump_clk_registers
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| H A D | amdgpu_rv1_clk_mgr.c | 42 void rv1_init_clocks(struct clk_mgr *clk_mgr) argument
47 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks) argument
93 static void ramp_up_dispclk_with_dpp(struct clk_mgr_internal *clk_mgr, struct dc *dc, struct dc_clocks *new_clocks) argument
134 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rv1_update_clocks
236 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rv1_enable_pme_wa
259 rv1_clk_mgr_construct(struct dc_context * ctx,struct clk_mgr_internal * clk_mgr,struct pp_smu_funcs * pp_smu) argument
[all...] |
| H A D | amdgpu_rv1_clk_mgr_vbios_smu.c | 76 int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) argument
93 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) argument
119 int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) argument
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/ |
| H A D | amdgpu_clk_mgr.c | 71 void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) argument
85 void clk_mgr_optimize_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) argument
101 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); local in function:dc_clk_mgr_create
179 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:dc_destroy_clk_mgr
[all...] |
| H A D | Makefile | [all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce120/ |
| H A D | amdgpu_dce120_clk_mgr.c | 133 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) argument
145 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | amdgpu_dce112_clk_mgr.c | 130 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) argument
173 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) argument
230 dce112_clk_mgr_construct(struct dc_context * ctx,struct clk_mgr_internal * clk_mgr) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | amdgpu_dce110_clk_mgr.c | 285 dce110_clk_mgr_construct(struct dc_context * ctx,struct clk_mgr_internal * clk_mgr) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/ |
| H A D | amdgpu_dce_clk_mgr.c | 136 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:dce_get_dp_ref_freq_khz
439 dce_clk_mgr_construct(struct dc_context * ctx,struct clk_mgr_internal * clk_mgr) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | amdgpu_dcn20_clk_mgr.c | 108 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, argument
132 dcn20_update_clocks_update_dentist(struct clk_mgr_internal * clk_mgr) argument
155 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:dcn2_update_clocks
276 dcn2_update_clocks_fpga(struct clk_mgr * clk_mgr,struct dc_state * context,bool safe_to_lower) argument
334 dcn2_init_clocks(struct clk_mgr * clk_mgr) argument
344 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:dcn2_enable_pme_wa
358 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:dcn2_read_clocks_from_hw_dentist
381 dcn2_get_clock(struct clk_mgr * clk_mgr,struct dc_state * context,enum dc_clock_type clock_type,struct dc_clock_config * clock_cfg) argument
434 dcn20_clk_mgr_construct(struct dc_context * ctx,struct clk_mgr_internal * clk_mgr,struct pp_smu_funcs * pp_smu,struct dccg * dccg) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | amdgpu_rn_clk_mgr.c | 105 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rn_update_clocks
201 get_vco_frequency_from_reg(struct clk_mgr_internal * clk_mgr) argument
234 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rn_dump_clk_registers_internal
399 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rn_enable_pme_wa
404 rn_init_clocks(struct clk_mgr * clk_mgr) argument
474 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); local in function:rn_notify_wm_ranges
699 rn_clk_mgr_construct(struct dc_context * ctx,struct clk_mgr_internal * clk_mgr,struct pp_smu_funcs * pp_smu,struct dccg * dccg) argument
[all...] |
| H A D | amdgpu_rn_clk_mgr_vbios_smu.c | 61 int rn_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) argument
78 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) argument
87 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) argument
110 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) argument
124 rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal * clk_mgr,int requested_dcfclk_khz) argument
139 rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal * clk_mgr,int requested_min_ds_dcfclk_khz) argument
154 rn_vbios_smu_set_phyclk(struct clk_mgr_internal * clk_mgr,int requested_phyclk_khz) argument
162 rn_vbios_smu_set_dppclk(struct clk_mgr_internal * clk_mgr,int requested_dpp_khz) argument
174 rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal * clk_mgr,enum dcn_pwr_state state) argument
189 rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal * clk_mgr,bool enable) argument
197 rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal * clk_mgr) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | dce_clk_mgr.c | 153 static int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) argument
179 int dce12_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) argument
218 dce_get_required_clocks_state(struct clk_mgr * clk_mgr,struct dc_state * context) argument
251 dce_set_clock(struct clk_mgr * clk_mgr,int requested_clk_khz) argument
293 dce112_set_clock(struct clk_mgr * clk_mgr,int requested_clk_khz) argument
469 dce121_clock_patch_xgmi_ss_info(struct clk_mgr * clk_mgr) argument
673 dce_update_clocks(struct clk_mgr * clk_mgr,struct dc_state * context,bool safe_to_lower) argument
700 dce11_update_clocks(struct clk_mgr * clk_mgr,struct dc_state * context,bool safe_to_lower) argument
727 dce112_update_clocks(struct clk_mgr * clk_mgr,struct dc_state * context,bool safe_to_lower) argument
754 dce12_update_clocks(struct clk_mgr * clk_mgr,struct dc_state * context,bool safe_to_lower) argument
962 dce_clk_mgr_destroy(struct clk_mgr ** clk_mgr) argument
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 189 struct clk_mgr { struct
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | amdgpu_dce110_hw_sequencer.c | 953 struct clk_mgr *clk_mgr; local in function:dce110_enable_audio_stream
989 struct clk_mgr *clk_mgr; local in function:dce110_disable_audio_stream
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 378 struct clk_mgr *clk_mgr; member in struct:dc_state
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| H A D | dc.h | 503 struct clk_mgr *clk_mgr; member in struct:dc
|