| /src/external/gpl3/gcc/dist/gcc/config/nds32/ |
| nds32-md-auxiliary.cc | 869 rtx cmp_op0 = operands[1]; local
892 tmp = cmp_op0;
893 cmp_op0 = cmp_op1;
915 tmp = cmp_op0;
916 cmp_op0 = cmp_op1;
928 cmp_op0, cmp_op1)));
942 rtx cmp_op0 = operands[2]; local
969 tmp = cmp_op0;
970 cmp_op0 = cmp_op1;
981 emit_insn (gen_cmpsf_un (operands[0], cmp_op0, cmp_op1))
1010 rtx cmp_op0 = XEXP (operands[1], 0); local
1133 rtx cmp_op0 = XEXP (operands[1], 0); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/nds32/ |
| nds32-md-auxiliary.cc | 869 rtx cmp_op0 = operands[1]; local
892 tmp = cmp_op0;
893 cmp_op0 = cmp_op1;
915 tmp = cmp_op0;
916 cmp_op0 = cmp_op1;
928 cmp_op0, cmp_op1)));
942 rtx cmp_op0 = operands[2]; local
969 tmp = cmp_op0;
970 cmp_op0 = cmp_op1;
981 emit_insn (gen_cmpsf_un (operands[0], cmp_op0, cmp_op1))
1010 rtx cmp_op0 = XEXP (operands[1], 0); local
1133 rtx cmp_op0 = XEXP (operands[1], 0); local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/microblaze/ |
| microblaze.cc | 3592 rtx cmp_op0 = operands[1];
3598 gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));
3603 comp_reg = cmp_op0;
3611 emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));
3619 condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1);
3620 emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1));
3628 rtx cmp_op0 = operands[1];
3634 gcc_assert ((GET_CODE (cmp_op0) == REG)
3635 || (GET_CODE (cmp_op0) == SUBREG))
3591 rtx cmp_op0 = operands[1]; local
3627 rtx cmp_op0 = operands[1]; local
3672 rtx cmp_op0 = XEXP (operands[0], 0); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/microblaze/ |
| microblaze.cc | 3584 rtx cmp_op0 = operands[1];
3590 gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));
3595 comp_reg = cmp_op0;
3603 emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));
3611 condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1);
3612 emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1));
3620 rtx cmp_op0 = operands[1];
3626 gcc_assert ((GET_CODE (cmp_op0) == REG)
3627 || (GET_CODE (cmp_op0) == SUBREG))
3583 rtx cmp_op0 = operands[1]; local
3619 rtx cmp_op0 = operands[1]; local
3664 rtx cmp_op0 = XEXP (operands[0], 0); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/loongarch/ |
| loongarch.cc | 3782 rtx cmp_op0 = *op0; local
3799 loongarch_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/riscv/ |
| riscv.cc | 2594 rtx tmp0, tmp1, cmp_op0 = *op0, cmp_op1 = *op1;
2606 tmp0 = riscv_force_binary (word_mode, EQ, cmp_op0, cmp_op0);
2615 tmp0 = riscv_force_binary (word_mode, EQ, cmp_op0, cmp_op0);
2618 *op1 = riscv_force_binary (word_mode, EQ, cmp_op0, cmp_op1);
2625 if (GET_MODE (cmp_op0) == SFmode && TARGET_64BIT) \
2626 emit_insn (gen_f##CMP##_quietsfdi4 (*op0, cmp_op0, cmp_op1)); \
2627 else if (GET_MODE (cmp_op0) == SFmode) \
2628 emit_insn (gen_f##CMP##_quietsfsi4 (*op0, cmp_op0, cmp_op1));
2591 rtx tmp0, tmp1, cmp_op0 = *op0, cmp_op1 = *op1; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/loongarch/ |
| loongarch.cc | 5266 rtx cmp_op0 = *op0; local
5283 loongarch_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
10436 /* Generate RTL for comparing CMP_OP0 and CMP_OP1 using condition COND and
10505 rtx cmp_op0 = operands[4]; local
10509 loongarch_expand_lsx_cmp (cmp_res, GET_CODE (cond), cmp_op0, cmp_op1);
|
| /src/external/gpl3/gcc/dist/gcc/config/mips/ |
| mips.cc | 5722 rtx cmp_op0 = *op0;
5733 *op0 = mips_zero_if_equal (cmp_op0, cmp_op1);
5737 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5769 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5782 *op0 = gen_reg_rtx (GET_MODE (cmp_op0));
5783 mips_emit_int_order_test (*code, &invert, *op0, cmp_op0, cmp_op1);
5788 else if (ALL_FIXED_POINT_MODE_P (GET_MODE (cmp_op0)))
5791 mips_emit_binary (*code, *op0, cmp_op0, cmp_op1);
5826 mips_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
5880 (set temp (COND:CCV2 CMP_OP0 CMP_OP1)
5695 rtx cmp_op0 = *op0; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/mips/ |
| mips.cc | 5589 rtx cmp_op0 = *op0;
5600 *op0 = mips_zero_if_equal (cmp_op0, cmp_op1);
5604 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5636 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5649 *op0 = gen_reg_rtx (GET_MODE (cmp_op0));
5650 mips_emit_int_order_test (*code, &invert, *op0, cmp_op0, cmp_op1);
5655 else if (ALL_FIXED_POINT_MODE_P (GET_MODE (cmp_op0)))
5658 mips_emit_binary (*code, *op0, cmp_op0, cmp_op1);
5693 mips_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
5747 (set temp (COND:CCV2 CMP_OP0 CMP_OP1)
5562 rtx cmp_op0 = *op0; local
[all...] |
