| /src/external/gpl3/gcc/dist/gcc/config/nds32/ |
| nds32-md-auxiliary.cc | 870 rtx cmp_op1 = operands[2]; local
893 cmp_op0 = cmp_op1;
894 cmp_op1 = tmp;
916 cmp_op0 = cmp_op1;
917 cmp_op1 = tmp;
928 cmp_op0, cmp_op1)));
943 rtx cmp_op1 = operands[3]; local
970 cmp_op0 = cmp_op1;
971 cmp_op1 =tmp;
981 emit_insn (gen_cmpsf_un (operands[0], cmp_op0, cmp_op1));
1011 rtx cmp_op1 = XEXP (operands[1], 1); local
1134 rtx cmp_op1 = XEXP (operands[1], 1); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/nds32/ |
| nds32-md-auxiliary.cc | 870 rtx cmp_op1 = operands[2]; local
893 cmp_op0 = cmp_op1;
894 cmp_op1 = tmp;
916 cmp_op0 = cmp_op1;
917 cmp_op1 = tmp;
928 cmp_op0, cmp_op1)));
943 rtx cmp_op1 = operands[3]; local
970 cmp_op0 = cmp_op1;
971 cmp_op1 =tmp;
981 emit_insn (gen_cmpsf_un (operands[0], cmp_op0, cmp_op1));
1011 rtx cmp_op1 = XEXP (operands[1], 1); local
1134 rtx cmp_op1 = XEXP (operands[1], 1); local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/microblaze/ |
| microblaze.cc | 3593 rtx cmp_op1 = operands[2];
3601 if (cmp_op1 == const0_rtx)
3611 emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));
3618 cmp_op1 = force_reg (mode, cmp_op1);
3619 condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1);
3620 emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1));
3629 rtx cmp_op1 = operands[2];
3638 if (cmp_op1 == const0_rtx)
3648 cmp_op0, cmp_op1));
3592 rtx cmp_op1 = operands[2]; local
3628 rtx cmp_op1 = operands[2]; local
3673 rtx cmp_op1 = XEXP (operands[0], 1); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/microblaze/ |
| microblaze.cc | 3585 rtx cmp_op1 = operands[2];
3593 if (cmp_op1 == const0_rtx)
3603 emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));
3610 cmp_op1 = force_reg (mode, cmp_op1);
3611 condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1);
3612 emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1));
3621 rtx cmp_op1 = operands[2];
3630 if (cmp_op1 == const0_rtx)
3640 cmp_op0, cmp_op1));
3584 rtx cmp_op1 = operands[2]; local
3620 rtx cmp_op1 = operands[2]; local
3665 rtx cmp_op1 = XEXP (operands[0], 1); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/loongarch/ |
| loongarch.cc | 3783 rtx cmp_op1 = *op1; local
3799 loongarch_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/riscv/ |
| riscv.cc | 2594 rtx tmp0, tmp1, cmp_op0 = *op0, cmp_op1 = *op1;
2607 tmp1 = riscv_force_binary (word_mode, EQ, cmp_op1, cmp_op1);
2616 tmp1 = riscv_force_binary (word_mode, EQ, cmp_op1, cmp_op1);
2618 *op1 = riscv_force_binary (word_mode, EQ, cmp_op0, cmp_op1);
2626 emit_insn (gen_f##CMP##_quietsfdi4 (*op0, cmp_op0, cmp_op1)); \
2628 emit_insn (gen_f##CMP##_quietsfsi4 (*op0, cmp_op0, cmp_op1)); \
2630 emit_insn (gen_f##CMP##_quietdfdi4 (*op0, cmp_op0, cmp_op1)); \
2632 emit_insn (gen_f##CMP##_quietdfsi4 (*op0, cmp_op0, cmp_op1)); \
2591 rtx tmp0, tmp1, cmp_op0 = *op0, cmp_op1 = *op1; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/loongarch/ |
| loongarch.cc | 5267 rtx cmp_op1 = *op1; local
5283 loongarch_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
10436 /* Generate RTL for comparing CMP_OP0 and CMP_OP1 using condition COND and
10506 rtx cmp_op1 = operands[5]; local
10509 loongarch_expand_lsx_cmp (cmp_res, GET_CODE (cond), cmp_op0, cmp_op1);
|
| /src/external/gpl3/gcc/dist/gcc/config/mips/ |
| mips.cc | 5723 rtx cmp_op1 = *op1;
5733 *op0 = mips_zero_if_equal (cmp_op0, cmp_op1);
5737 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5769 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5783 mips_emit_int_order_test (*code, &invert, *op0, cmp_op0, cmp_op1);
5791 mips_emit_binary (*code, *op0, cmp_op0, cmp_op1);
5826 mips_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
5880 (set temp (COND:CCV2 CMP_OP0 CMP_OP1))
5885 enum rtx_code cond, rtx cmp_op0, rtx cmp_op1)
5893 gen_rtx_fmt_ee (cond, VOIDmode, cmp_op0, cmp_op1)));
5696 rtx cmp_op1 = *op1; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/mips/ |
| mips.cc | 5590 rtx cmp_op1 = *op1;
5600 *op0 = mips_zero_if_equal (cmp_op0, cmp_op1);
5604 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5636 *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1);
5650 mips_emit_int_order_test (*code, &invert, *op0, cmp_op0, cmp_op1);
5658 mips_emit_binary (*code, *op0, cmp_op0, cmp_op1);
5693 mips_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
5747 (set temp (COND:CCV2 CMP_OP0 CMP_OP1))
5752 enum rtx_code cond, rtx cmp_op0, rtx cmp_op1)
5760 gen_rtx_fmt_ee (cond, VOIDmode, cmp_op0, cmp_op1)));
5563 rtx cmp_op1 = *op1; local
[all...] |
