| /src/sys/arch/epoc32/stand/e32boot/ldd/ |
| epoc32.h | 32 CPU *cpu; member in class:EPOC32
|
| /src/external/gpl3/gdb.old/dist/sim/common/ |
| sim-reg.c | 35 SIM_CPU *cpu = STATE_CPU (sd, 0); local
38 return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
50 SIM_CPU *cpu = STATE_CPU (sd, 0); local
53 return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
|
| sim-run.c | 38 sim_cpu *cpu; local
40 cpu = STATE_CPU (sd, 0);
41 cia = CPU_PC_GET (cpu);
49 CPU_PC_SET (cpu, cia);
|
| sim-cpu.c | 0 /* CPU support.
30 Space for the cpu must currently exist prior to parsing ARGV. */
48 /* Allocate space for a cpu object.
54 sim_cpu *cpu = zalloc (sizeof (*cpu)); local
61 CPU_ARCH_DATA (cpu) = zalloc (extra_bytes);
63 return cpu;
78 /* Free all resources used by CPU. */
81 sim_cpu_free (sim_cpu *cpu)
83 free (CPU_ARCH_DATA (cpu));
[all...] |
| sim-resume.c | 88 sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr); local
89 SIM_CPU_EXCEPTION_RESUME (sd, cpu, sig_to_deliver);
|
| /src/external/gpl3/gdb/dist/sim/common/ |
| sim-reg.c | 35 SIM_CPU *cpu = STATE_CPU (sd, 0); local
38 return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
50 SIM_CPU *cpu = STATE_CPU (sd, 0); local
53 return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
|
| sim-run.c | 38 sim_cpu *cpu; local
40 cpu = STATE_CPU (sd, 0);
41 cia = CPU_PC_GET (cpu);
49 CPU_PC_SET (cpu, cia);
|
| sim-cpu.c | 0 /* CPU support.
30 Space for the cpu must currently exist prior to parsing ARGV. */
48 /* Allocate space for a cpu object.
54 sim_cpu *cpu = zalloc (sizeof (*cpu)); local
61 CPU_ARCH_DATA (cpu) = zalloc (extra_bytes);
63 return cpu;
78 /* Free all resources used by CPU. */
81 sim_cpu_free (sim_cpu *cpu)
83 free (CPU_ARCH_DATA (cpu));
[all...] |
| sim-resume.c | 88 sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr); local
89 SIM_CPU_EXCEPTION_RESUME (sd, cpu, sig_to_deliver);
|
| /src/sys/arch/m68k/m68k/ |
| procfs_machdep.c | 21 const char *cpu, *mmu, *fpu; local
26 cpu = "68010";
29 cpu = "68020";
32 cpu = "68030";
35 cpu = "68040";
38 cpu = "68060";
41 cpu = "680x0";
95 "CPU:\t\t%s\n"
102 cpu, mmu, fpu);
|
| /src/external/gpl3/gcc/dist/gcc/config/mips/ |
| driver-native.cc | 36 put at the place of the above two options, depending on what CPU
46 const char *cpu = NULL; local
66 if (startswith (buf, "cpu model"))
71 cpu = "loongson2e";
75 cpu = "loongson2f";
79 cpu = "loongson3a";
81 cpu = "sb1";
83 cpu = "r5000";
85 cpu = "octeon2";
87 cpu = "octeon"
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/mips/ |
| driver-native.cc | 33 put at the place of the above two options, depending on what CPU
43 const char *cpu = NULL; local
60 if (startswith (buf, "cpu model"))
65 cpu = "loongson2e";
69 cpu = "loongson2f";
73 cpu = "loongson3a";
75 cpu = "sb1";
77 cpu = "r5000";
79 cpu = "octeon2";
81 cpu = "octeon"
[all...] |
| /src/external/gpl3/gdb/dist/sim/mips/ |
| m16run.c | 31 #define CPU cpu
39 sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr); local
40 address_word cia = CPU_PC_GET (cpu);
67 CPU_PC_SET (CPU, cia);
69 cia = CPU_PC_GET (CPU);
|
| micromipsrun.c | 41 #define CPU cpu
44 micromips_instruction_decode (SIM_DESC sd, sim_cpu * cpu,
67 sim_engine_abort (sd, cpu, cia,
85 sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr); local
86 micromips32_instruction_address cia = CPU_PC_GET (cpu);
113 micromips_instruction_decode (sd, cpu, cia,
130 CPU_PC_SET (cpu, cia);
132 cia = CPU_PC_GET (cpu);
|
| /src/external/gpl3/gdb.old/dist/sim/mips/ |
| m16run.c | 31 #define CPU cpu
39 sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr); local
40 address_word cia = CPU_PC_GET (cpu);
67 CPU_PC_SET (CPU, cia);
69 cia = CPU_PC_GET (CPU);
|
| micromipsrun.c | 41 #define CPU cpu
44 micromips_instruction_decode (SIM_DESC sd, sim_cpu * cpu,
67 sim_engine_abort (sd, cpu, cia,
85 sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr); local
86 micromips32_instruction_address cia = CPU_PC_GET (cpu);
113 micromips_instruction_decode (sd, cpu, cia,
130 CPU_PC_SET (cpu, cia);
132 cia = CPU_PC_GET (cpu);
|
| /src/external/gpl3/gdb.old/dist/sim/riscv/ |
| interp.c | 40 SIM_CPU *cpu;
44 cpu = STATE_CPU (sd, 0);
48 step_once (cpu);
81 /* The cpu data is kept in a separately allocated chunk of memory. */
126 /* CPU specific initialization. */
129 SIM_CPU *cpu = STATE_CPU (sd, i);
131 initialize_cpu (sd, cpu, i);
147 SIM_CPU *cpu = STATE_CPU (sd, 0);
156 sim_pc_set (cpu, addr);
39 SIM_CPU *cpu; local
127 SIM_CPU *cpu = STATE_CPU (sd, i); local
144 SIM_CPU *cpu = STATE_CPU (sd, 0); local
|
| /src/external/mpl/bind/dist/lib/dns/rdata/generic/ |
| hinfo_13.h | 21 char *cpu; member in struct:dns_rdata_hinfo
|
| /src/external/mpl/dhcp/bind/dist/lib/dns/rdata/generic/ |
| hinfo_13.h | 22 char *cpu; member in struct:dns_rdata_hinfo
|
| /src/external/gpl3/gdb/dist/sim/riscv/ |
| interp.c | 40 SIM_CPU *cpu;
44 cpu = STATE_CPU (sd, 0);
48 step_once (cpu);
81 /* The cpu data is kept in a separately allocated chunk of memory. */
126 /* CPU specific initialization. */
129 SIM_CPU *cpu = STATE_CPU (sd, i);
131 initialize_cpu (sd, cpu, i);
147 SIM_CPU *cpu = STATE_CPU (sd, 0);
156 sim_pc_set (cpu, addr);
39 SIM_CPU *cpu; local
127 SIM_CPU *cpu = STATE_CPU (sd, i); local
144 SIM_CPU *cpu = STATE_CPU (sd, 0); local
|
| /src/sys/arch/evbmips/sbmips/ |
| cpu.c | 1 /* $NetBSD: cpu.c,v 1.4 2023/12/05 19:16:48 andvar Exp $ */
36 __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.4 2023/12/05 19:16:48 andvar Exp $");
41 #include <sys/cpu.h>
63 CFATTACH_DECL_NEW(cpu, sizeof(struct cpu_softc),
89 struct cpu_softc * const cpu = device_private(self); local
96 /* XXX this code must run on the target CPU */
101 /* Determine CPU frequency */
103 /* XXX: We should determine the CPU frequency from a time source
104 * not coupled with the CPU crystal, like the RTC. Unfortunately
130 cpu->sb1cpu_dev = self
[all...] |
| /src/sys/arch/hpc/stand/hpcboot/ |
| framebuffer.h | 35 uint32_t cpu, machine; member in struct:FrameBufferInfo::framebuffer_info
|
| /src/sys/arch/hpc/stand/hpcboot/sh3/ |
| sh_console.h | 47 uint32_t cpu, machine; member in struct:SHConsole::console_info
|
| /src/sys/arch/sbmips/sbmips/ |
| cpu.c | 1 /* $NetBSD: cpu.c,v 1.24 2023/12/05 19:19:26 andvar Exp $ */
36 __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.24 2023/12/05 19:19:26 andvar Exp $");
41 #include <sys/cpu.h>
62 CFATTACH_DECL_NEW(cpu, sizeof(struct cpu_softc),
88 struct cpu_softc * const cpu = device_private(self); local
95 /* XXX this code must run on the target CPU */
100 /* Determine CPU frequency */
102 /* XXX: We should determine the CPU frequency from a time source
103 * not coupled with the CPU crystal, like the RTC. Unfortunately
129 cpu->sb1cpu_dev = self
[all...] |
| /src/sys/dev/acpi/ |
| acpi_srat.h | 46 * entries or ACPI CPU device have a _CDM.
61 struct acpisrat_cpu **cpu; /* Array of cpus */ member in struct:acpisrat_node
|
