| amdgpu_gfx_v9_0.c | 2734 uint32_t default_data = 0; local in function:pwr_10_0_gfxip_control_over_cgpg
2736 default_data = data = RREG32(SOC15_REG_OFFSET(PWR, 0, mmPWR_MISC_CNTL_STATUS));
2740 if(default_data != data)
2746 if(default_data != data)
2751 if(default_data != data)
2802 uint32_t default_data = 0; local in function:gfx_v9_0_enable_sck_slow_down_on_power_up
2804 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
2808 if (default_data != data)
2816 uint32_t default_data = 0; local in function:gfx_v9_0_enable_sck_slow_down_on_power_down
2818 default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL))
2830 uint32_t default_data = 0; local in function:gfx_v9_0_enable_cp_power_gating
2843 uint32_t data, default_data; local in function:gfx_v9_0_enable_gfx_cg_power_gating
2856 uint32_t data, default_data; local in function:gfx_v9_0_enable_gfx_pipeline_powergating
2873 uint32_t data, default_data; local in function:gfx_v9_0_enable_gfx_static_mg_power_gating
2886 uint32_t data, default_data; local in function:gfx_v9_0_enable_gfx_dynamic_mg_power_gating
[all...] |
