| /src/external/lgpl3/gmp/dist/mpn/generic/ |
| hgcd2_jacobi.c | 99 div2 (mp_ptr rp, function
222 mp_limb_t q = div2 (r, ah, al, bh, bl);
267 mp_limb_t q = div2 (r, bh, bl, ah, al);
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| hgcd2.c | 404 #define div2 mpn_div_22 macro
406 mp_limb_t div2 (mp_ptr, mp_limb_t, mp_limb_t, mp_limb_t, mp_limb_t);
411 div2 (mp_ptr rp, function
466 /* Bit-wise div2. Relies on fast count_leading_zeros. */
468 div2 (mp_ptr rp, function
516 The div2 function starts with checking the most significant bit of
587 mp_limb_t q = div2 (r, ah, al, bh, bl);
629 mp_limb_t q = div2 (r, bh, bl, ah, al);
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
| nouveau_nvkm_engine_disp_sorgf119.c | 130 u32 div2 = sor->asy.link == 3; local
135 div2 = 1;
137 nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1);
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| /src/sys/arch/mips/atheros/ |
| ar5315.c | 171 const uint32_t div2 = (AR5315_PLLC_DIV_2(pllc) + 1) * 2; /* results in 2 or 4 */ local
176 freqs->freq_pll = (freqs->freq_ref / refdiv) * div2 * fbdiv;
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| /src/sys/dev/i2c/ |
| adm1026.c | 439 uint8_t reg, div1, div2, val; local
458 if (adm1026_read_reg(sc, reg, &div2) != 0) {
464 div2 = div2_val;
465 sc->sc_fandiv[4] = 1 << ADM1026_FAN4_DIV(div2);
466 sc->sc_fandiv[5] = 1 << ADM1026_FAN5_DIV(div2);
467 sc->sc_fandiv[6] = 1 << ADM1026_FAN6_DIV(div2);
468 sc->sc_fandiv[7] = 1 << ADM1026_FAN7_DIV(div2);
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| /src/external/mit/isl/dist/ |
| isl_coalesce.c | 2875 isl_aff *div1, *div2; local
2886 div2 = isl_local_space_get_div(ls2, i);
2889 div2 = isl_aff_substitute_equalities(div2,
2891 div2 = isl_aff_sub(div2, div1);
2892 r = shift_if_cst_int(info1, i, div2);
2893 isl_aff_free(div2);
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| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_ddi.c | 1458 u32 m1, m2_int, m2_frac, div1, div2, ref_clock; local
1507 div2 = (pll_state->mg_clktop2_hsclkctl &
1511 /* div2 value of 0 is same as 1 means no div */
1512 if (div2 == 0)
1513 div2 = 1;
1521 tmp = div_u64(tmp, 5 * div1 * div2);
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| intel_dpll_mgr.c | 2679 int div2; local
2687 for (div2 = 10; div2 > 0; div2--) {
2688 int dco = div1 * div2 * clock_khz * 5;
2695 if (div2 >= 2) {
2738 MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO(div2);
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