| /src/external/gpl3/binutils/dist/gprofng/common/ |
| core_pcbe.c | 118 * For now, I don't know how to handle msr_offset. 145 uint16_t msr_offset; member in struct:events_table_t 743 /* { 0xB7, 0x01, C0|C1|C2|C3, "off_core_response_0" , 0x0, ATTR_NONE, 0x1A6 }, ignore events that require msr_offset */ \ 747 /* { 0xBB, 0x01, C0|C1|C2|C3, "off_core_response_1" , 0x0, ATTR_NONE, 0x1A7 }, ignore events that require msr_offset */ \ 1032 /* { 0xB7, 0x01, C0|C1|C2|C3, "off_core_response_0" , 0x0, ATTR_NONE, 0x1A6 }, ignore events that require msr_offset */ \ 1036 /* { 0xBB, 0x01, C0|C1|C2|C3, "off_core_response_1" , 0x0, ATTR_NONE, 0x1A7 }, ignore events that require msr_offset */ \ 1309 /* { 0xB7, 0x01, C_ALL, "off_core_response_0" , 0x0, ATTR_NONE, 0x1A6 }, ignore events that require msr_offset */ \ 1310 /* { 0xBB, 0x01, C_ALL, "off_core_response_1" , 0x0, ATTR_NONE, 0x1A7 }, ignore events that require msr_offset */ \ 1348 /* { 0xCD, 0x01, C3, "mem_trans_retired.load_latency" , 0x0, ATTR_NONE, 0x3F6 }, ignore events that require msr_offset */ /* See Section "MSR_PEBS_LD_LAT_THRESHOLD" */ \ 1393 /* { 0xD3, 0x01, C_ALL, "mem_load_uops_llc_miss_retired.local_dram" , 0x0, ATTR_NONE, 0x3C9 }, ignore events that require msr_offset */ \ [all...] |
| /src/external/gpl3/binutils.old/dist/gprofng/common/ |
| core_pcbe.c | 118 * For now, I don't know how to handle msr_offset. 145 uint16_t msr_offset; member in struct:events_table_t 743 /* { 0xB7, 0x01, C0|C1|C2|C3, "off_core_response_0" , 0x0, ATTR_NONE, 0x1A6 }, ignore events that require msr_offset */ \ 747 /* { 0xBB, 0x01, C0|C1|C2|C3, "off_core_response_1" , 0x0, ATTR_NONE, 0x1A7 }, ignore events that require msr_offset */ \ 1032 /* { 0xB7, 0x01, C0|C1|C2|C3, "off_core_response_0" , 0x0, ATTR_NONE, 0x1A6 }, ignore events that require msr_offset */ \ 1036 /* { 0xBB, 0x01, C0|C1|C2|C3, "off_core_response_1" , 0x0, ATTR_NONE, 0x1A7 }, ignore events that require msr_offset */ \ 1309 /* { 0xB7, 0x01, C_ALL, "off_core_response_0" , 0x0, ATTR_NONE, 0x1A6 }, ignore events that require msr_offset */ \ 1310 /* { 0xBB, 0x01, C_ALL, "off_core_response_1" , 0x0, ATTR_NONE, 0x1A7 }, ignore events that require msr_offset */ \ 1348 /* { 0xCD, 0x01, C3, "mem_trans_retired.load_latency" , 0x0, ATTR_NONE, 0x3F6 }, ignore events that require msr_offset */ /* See Section "MSR_PEBS_LD_LAT_THRESHOLD" */ \ 1393 /* { 0xD3, 0x01, C_ALL, "mem_load_uops_llc_miss_retired.local_dram" , 0x0, ATTR_NONE, 0x3C9 }, ignore events that require msr_offset */ \ [all...] |