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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_mpc.c 145 struct color_matrices_reg ocsc_regs; local in function:mpc2_set_output_csc
170 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A;
171 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A;
172 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A;
173 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A;
176 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_A[opp_id]);
177 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_A[opp_id]);
179 ocsc_regs.csc_c11_c12 = REG(CSC_C11_C12_B[opp_id]);
180 ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_B[opp_id]);
186 &ocsc_regs);
200 struct color_matrices_reg ocsc_regs; local in function:mpc2_set_ocsc_default
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