| /src/sys/arch/riscv/starfive/ |
| jh7110_pcie.c | 512 bus_addr_t phyaddr; // PADDR? local in function:jh7110_pcie_atr_init
539 phyaddr =
547 BUS_ADDR_LO32(phyaddr));
548 WR4(sc, PLDA_ATR_AXI4_SLV0_SRC_ADDR_HI(n), BUS_ADDR_HI32(phyaddr));
|
| /src/sys/dev/pci/ |
| if_rge.c | 2741 uint16_t off, phyaddr; local in function:rge_write_phy
2743 phyaddr = addr ? addr : RGE_PHYBASE + (reg / 8);
2744 phyaddr <<= 4;
2748 phyaddr += (off - 16) << 1;
2750 rge_write_phy_ocp(sc, phyaddr, val);
2756 uint16_t off, phyaddr; local in function:rge_read_phy
2758 phyaddr = addr ? addr : RGE_PHYBASE + (reg / 8);
2759 phyaddr <<= 4;
2763 phyaddr += (off - 16) << 1;
2765 return (rge_read_phy_ocp(sc, phyaddr));
[all...] |
| /src/sys/dev/ic/ |
| gem.c | 251 int i, error, phyaddr; local in function:gem_attach
399 phyaddr = GEM_PHYAD_EXTERNAL;
402 phyaddr = MII_PHY_ANY;
405 mii_attach(sc->sc_dev, mii, 0xffffffff, phyaddr,
422 phyaddr = GEM_PHYAD_INTERNAL;
425 phyaddr = GEM_PHYAD_EXTERNAL;
428 phyaddr = MII_PHY_ANY;
431 mii_attach(sc->sc_dev, mii, 0xffffffff, phyaddr,
|
| /src/sys/dev/marvell/ |
| if_gfe.c | 410 int phyaddr, error; local in function:gfe_attach
429 phyaddr = gfec_enet_phy(parent, sc->sc_macno);
448 aprint_normal_dev(self, "phy %d (rmii)\n", phyaddr);
451 aprint_normal_dev(self, "phy %d (mii)\n", phyaddr);
502 mii_attach(sc->sc_dev, mii, 0xffffffff, phyaddr,
|
| if_mvgbe.c | 429 uint32_t phyaddr; local in function:mvgbec_attach
446 phyaddr = 0;
447 MVGBE_WRITE(csc, MVGBE_PHYADDR, phyaddr);
479 phyaddr |= MVGBE_PHYADDR_PHYAD(j,
485 MVGBE_WRITE(csc, MVGBE_PHYADDR, phyaddr);
|
| if_mvxpe.c | 293 uint32_t phyaddr, maddrh, maddrl; local in function:mvxpe_attach
488 phyaddr = MVXPE_PHYADDR_PHYAD(child->mii_phy);
489 MVXPE_WRITE(sc, MVXPE_PHYADDR, phyaddr);
490 DPRINTSC(sc, 1, "PHYADDR: %#x\n", MVXPE_READ(sc, MVXPE_PHYADDR));
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