| amdgpu_dm_pp_smu.c | 459 struct pp_clock_levels_with_voltage pp_clk_info = {0}; local in function:dm_pp_get_clock_levels_by_type_with_voltage
466 &pp_clk_info);
472 &pp_clk_info))
476 pp_to_dc_clock_levels_with_voltage(&pp_clk_info, clk_level_info, clk_type);
529 struct amd_pp_clock_info pp_clk_info = {0}; local in function:dm_pp_get_static_clocks
535 &pp_clk_info);
537 ret = smu_get_current_clocks(&adev->smu, &pp_clk_info);
541 static_clk_info->max_clocks_state = pp_to_dc_powerlevel_state(pp_clk_info.max_clocks_state);
542 static_clk_info->max_mclk_khz = pp_clk_info.max_memory_clock * 10;
543 static_clk_info->max_sclk_khz = pp_clk_info.max_engine_clock * 10
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