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  /src/sys/arch/arm/amlogic/
mesongx_mmc.c 238 struct clk *sc_clk_clkin[2]; member in struct:mesongx_mmc_softc
303 sc->sc_clk_clkin[0] = fdtbus_clock_get(phandle, "clkin0");
304 sc->sc_clk_clkin[1] = fdtbus_clock_get(phandle, "clkin1");
306 if (sc->sc_clk_core == NULL || sc->sc_clk_clkin[0] == NULL ||
307 sc->sc_clk_clkin[1] == NULL) {
324 if (clk_enable(sc->sc_clk_clkin[0]) != 0 ||
325 clk_enable(sc->sc_clk_clkin[1]) != 0) {
482 const u_int parent_rate = clk_get_rate(sc->sc_clk_clkin[sel]);

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