amdgpu_vega20_ppt.c | 672 struct vega20_single_dpm_table *single_dpm_table, 692 single_dpm_table->count = num_of_levels; 707 single_dpm_table->dpm_levels[i].value = clk; 708 single_dpm_table->dpm_levels[i].enabled = true; 727 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_set_default_dpm_table 732 single_dpm_table = &(dpm_table->soc_table); 735 ret = vega20_set_single_dpm_table(smu, single_dpm_table, 742 single_dpm_table->count = 1; 743 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; 745 vega20_init_single_dpm_state(&(single_dpm_table->dpm_state)) 958 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_print_clk_levels 1197 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_upload_dpm_level 1285 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_force_clk_levels 1449 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_get_clock_by_type_with_latency 1742 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_get_od_percentage 2533 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_set_od_percentage 2605 struct vega20_single_dpm_table *single_dpm_table; local in function:vega20_odn_edit_dpm_table [all...] |