HomeSort by: relevance | last modified time | path
    Searched defs:subreg (Results 1 - 25 of 27) sorted by relevancy

1 2

  /src/external/gpl3/gcc/dist/gcc/
reg-stack.cc 426 case SUBREG:
430 rtx subreg = SUBREG_REG (*pat);
432 if (STACK_REG_P (subreg))
434 int regno_off = subreg_regno_offset (REGNO (subreg),
435 GET_MODE (subreg),
438 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
439 GET_MODE (subreg));
509 if (GET_CODE (recog_data.operand[i]) == SUBREG
527 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2206 if (GET_CODE (recog_data.operand[i]) == SUBREG
425 rtx subreg = SUBREG_REG (*pat); local
    [all...]
cselib.cc 1194 while (GET_CODE (dest) == SUBREG
1219 while (GET_CODE (src_equiv) == SUBREG
1240 while (GET_CODE (src) == SUBREG)
1953 case SUBREG:
1955 rtx subreg;
1959 subreg = evd->callback (orig, evd->regs_active, max_depth,
1961 if (subreg != orig)
1962 return subreg;
1965 subreg = cselib_expand_value_rtx_1 (SUBREG_REG (orig), evd,
1967 if (!subreg)
1954 rtx subreg; local
    [all...]
ira-costs.cc 1196 if (code0 == SUBREG)
1198 if (code1 == SUBREG)
1361 if (GET_CODE (dest) == SUBREG
1365 if (GET_CODE (src) == SUBREG
1471 if (GET_CODE (recog_data.operand[i]) == SUBREG)
1622 if (GET_CODE (op) == SUBREG)
1815 return the pseudo through parameter REG. If the pseudo is a part of subreg,
1816 return the subreg through parameter SUBREG. */
1819 get_equiv_regno (rtx x, int &regno, rtx &subreg)
1854 rtx subreg; local
    [all...]
simplify-rtx.cc 247 originally stored, attempt to fix that up via subreg simplifications.
475 if (code == SUBREG)
577 1. a lowpart subreg. This form is only a truncation when both
579 are scalar integers, and only then when the subreg is used as
584 proving this is on the creator of the subreg -- e.g. the
602 regardless of whether the outer truncation came from a SUBREG or a
608 is a no-op and can be represented as a subreg, it does not follow
634 origmode, we can omit both the extension and the subreg.
670 the outer subreg is effectively a truncation to the original mode. */
687 the outer subreg is effectively a truncation to the original mode. *
1566 rtx subreg = SUBREG_REG (op); local
1719 rtx subreg = SUBREG_REG (op); local
    [all...]
ira.cc 3069 /* Set if this register is mentioned in a paradoxical subreg. */
3458 /* Check whether the SUBREG is a paradoxical subreg and set the result
3467 const_rtx subreg = *iter;
3468 if (GET_CODE (subreg) == SUBREG)
3470 const_rtx reg = SUBREG_REG (subreg);
3471 if (REG_P (reg) && paradoxical_subreg_p (subreg))
3681 /* This might be setting a SUBREG of a pseudo, a pseudo that is
3687 /* Don't set reg mentioned in a paradoxical subreg
3446 const_rtx subreg = *iter; local
    [all...]
reload.cc 340 /* If X is a paradoxical SUBREG, use the inner value to determine both the
688 /* We are trying to reload a subreg of something that is not a register.
690 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
821 (a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
838 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
849 if (GET_CODE (x) != SUBREG)
1039 /* If we are reloading a (SUBREG constant ...), really reload just the
1040 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1041 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is stil
3945 rtx subreg = NULL_RTX; local
    [all...]
reload1.cc 102 /* Widest mode in which each pseudo reg is referred to (via subreg). */
1172 from misarranging variable-array code, and simplify (subreg (reg))
1236 /* Simplify (subreg (reg)) if it appears as an operand. */
2191 /* The sizes are taken from a subreg operation, which guarantees
2250 /* The sizes are taken from a subreg operation, which guarantees
2825 case SUBREG:
2827 Convert (subreg (mem)) to (mem) if not paradoxical.
2828 Also, if we have a non-paradoxical (subreg (pseudo)) and the
2850 (set (subreg:m1 (reg:m2 R) 0) ...)
2855 subreg so that push_reload can see it. *
6427 rtx subreg = NULL_RTX; local
    [all...]
var-tracking.cc 947 use_narrower_mode_test (rtx x, const_rtx subreg)
959 if (cselib_lookup (x, GET_MODE (SUBREG_REG (subreg)), 0, VOIDmode))
961 if (!validate_subreg (GET_MODE (subreg), GET_MODE (x), x,
962 subreg_lowpart_offset (GET_MODE (subreg),
973 enum machine_mode mode = GET_MODE (subreg);
980 if (GET_CODE (op1) == SUBREG || GET_CODE (op1) == CONCAT)
1121 case SUBREG:
1147 && GET_CODE (tem) == SUBREG
3474 when not recursing. (subreg:QI (value:SI 1:1) 0)
3475 and (subreg:QI (value:DI 2:2) 0) can be compared
8493 rtx result, subreg; local
    [all...]
  /src/external/gpl3/gcc.old/dist/gcc/
reg-stack.cc 426 case SUBREG:
430 rtx subreg = SUBREG_REG (*pat);
432 if (STACK_REG_P (subreg))
434 int regno_off = subreg_regno_offset (REGNO (subreg),
435 GET_MODE (subreg),
438 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
439 GET_MODE (subreg));
509 if (GET_CODE (recog_data.operand[i]) == SUBREG
527 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2200 if (GET_CODE (recog_data.operand[i]) == SUBREG
425 rtx subreg = SUBREG_REG (*pat); local
    [all...]
cselib.cc 1175 while (GET_CODE (dest) == SUBREG
1200 while (GET_CODE (src_equiv) == SUBREG
1221 while (GET_CODE (src) == SUBREG)
1913 case SUBREG:
1915 rtx subreg;
1919 subreg = evd->callback (orig, evd->regs_active, max_depth,
1921 if (subreg != orig)
1922 return subreg;
1925 subreg = cselib_expand_value_rtx_1 (SUBREG_REG (orig), evd,
1927 if (!subreg)
1914 rtx subreg; local
    [all...]
simplify-rtx.cc 247 originally stored, attempt to fix that up via subreg simplifications.
475 if (code == SUBREG)
577 1. a lowpart subreg. This form is only a truncation when both
579 are scalar integers, and only then when the subreg is used as
584 proving this is on the creator of the subreg -- e.g. the
602 regardless of whether the outer truncation came from a SUBREG or a
608 is a no-op and can be represented as a subreg, it does not follow
634 origmode, we can omit both the extension and the subreg.
670 the outer subreg is effectively a truncation to the original mode. */
687 the outer subreg is effectively a truncation to the original mode. *
1519 rtx subreg = SUBREG_REG (op); local
1654 rtx subreg = SUBREG_REG (op); local
    [all...]
ira.cc 3061 /* Set if this register is mentioned in a paradoxical subreg. */
3446 /* Check whether the SUBREG is a paradoxical subreg and set the result
3455 const_rtx subreg = *iter;
3456 if (GET_CODE (subreg) == SUBREG)
3458 const_rtx reg = SUBREG_REG (subreg);
3459 if (REG_P (reg) && paradoxical_subreg_p (subreg))
3669 /* This might be setting a SUBREG of a pseudo, a pseudo that is
3675 /* Don't set reg mentioned in a paradoxical subreg
3434 const_rtx subreg = *iter; local
    [all...]
reload.cc 340 /* If X is a paradoxical SUBREG, use the inner value to determine both the
688 /* We are trying to reload a subreg of something that is not a register.
690 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
821 (a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
838 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
849 if (GET_CODE (x) != SUBREG)
1039 /* If we are reloading a (SUBREG constant ...), really reload just the
1040 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1041 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is stil
3950 rtx subreg = NULL_RTX; local
    [all...]
reload1.cc 102 /* Widest mode in which each pseudo reg is referred to (via subreg). */
1172 from misarranging variable-array code, and simplify (subreg (reg))
1236 /* Simplify (subreg (reg)) if it appears as an operand. */
2191 /* The sizes are taken from a subreg operation, which guarantees
2250 /* The sizes are taken from a subreg operation, which guarantees
2825 case SUBREG:
2827 Convert (subreg (mem)) to (mem) if not paradoxical.
2828 Also, if we have a non-paradoxical (subreg (pseudo)) and the
2850 (set (subreg:m1 (reg:m2 R) 0) ...)
2855 subreg so that push_reload can see it. *
6427 rtx subreg = NULL_RTX; local
    [all...]
var-tracking.cc 953 use_narrower_mode_test (rtx x, const_rtx subreg)
965 if (cselib_lookup (x, GET_MODE (SUBREG_REG (subreg)), 0, VOIDmode))
967 if (!validate_subreg (GET_MODE (subreg), GET_MODE (x), x,
968 subreg_lowpart_offset (GET_MODE (subreg),
979 enum machine_mode mode = GET_MODE (subreg);
986 if (GET_CODE (op1) == SUBREG || GET_CODE (op1) == CONCAT)
1127 case SUBREG:
1153 && GET_CODE (tem) == SUBREG
3484 when not recursing. (subreg:QI (value:SI 1:1) 0)
3485 and (subreg:QI (value:DI 2:2) 0) can be compared
8510 rtx result, subreg; local
    [all...]
  /src/external/gpl3/gcc/dist/gcc/config/rs6000/
rs6000-builtin.cc 3259 rtx subreg = simplify_gen_subreg (CCmode, scratch1, SImode, 0); local
3260 emit_insn (gen_movcc (subreg, cr));
  /src/external/gpl3/gcc.old/dist/gcc/config/rs6000/
rs6000-builtin.cc 3283 rtx subreg = simplify_gen_subreg (CCmode, scratch1, SImode, 0); local
3284 emit_insn (gen_movcc (subreg, cr));
  /src/external/gpl3/gcc.old/dist/gcc/config/tilegx/
tilegx.cc 875 if (GET_CODE (x) == SUBREG)
1575 rtx temp, subreg;
1587 subreg = simplify_gen_subreg (DImode, dest_reg, GET_MODE (dest_reg), 0);
1588 gcc_assert (subreg != NULL);
1589 dest_reg = subreg;
2534 subreg here though. */
1571 rtx temp, subreg; local
  /src/external/gpl3/gcc/dist/gcc/config/riscv/
riscv-v.cc 2257 rtx subreg local
2260 emit_move_insn (subreg, dup);
2330 rtx subreg = simplify_gen_subreg (subpart_mode, ops[0], local
2341 rtx operands[] = {subreg, mem};
2346 emit_move_insn (subreg, mem);
2355 rtx subreg = simplify_gen_subreg (subpart_mode, ops[1], local
2366 rtx operands[] = {mem, subreg};
2371 emit_move_insn (mem, subreg);
riscv-vector-builtins-bases.cc 1832 rtx subreg = simplify_gen_subreg (GET_MODE (src), e.target, variable
1834 emit_move_insn (subreg, src);
1869 rtx subreg variable
1871 return subreg;
1921 rtx subreg = simplify_gen_subreg (GET_MODE (src), e.target, variable
1923 emit_move_insn (subreg, src);
  /src/external/gpl3/gcc.old/dist/gcc/analyzer/
region-model.cc 3385 const region *subreg = sub_sval->get_subregion (); local
3388 if (const field_region *field_reg = subreg->dyn_cast_field_region ())
  /src/external/gpl3/gcc/dist/gcc/analyzer/
region-model.cc 5180 const region *subreg = sub_sval->get_subregion (); local
5183 if (const field_region *field_reg = subreg->dyn_cast_field_region ())
  /src/external/gpl3/gcc/dist/gcc/config/aarch64/
aarch64-builtins.cc 2800 rtx const_str, input_val, subreg; local
2875 subreg = lowpart_subreg (sysreg_mode, input_val, mode);
2878 subreg = gen_lowpart_SUBREG (SImode, input_val);
2879 subreg = gen_lowpart_SUBREG (DImode, subreg);
2884 create_input_operand (&ops[1], subreg, sysreg_mode);
2912 subreg = gen_lowpart_SUBREG (SImode, target);
2913 return gen_lowpart_SUBREG (SFmode, subreg);
  /src/external/gpl3/gcc.old/dist/gcc/config/s390/
s390.cc 1698 if (GET_CODE (inner) == SUBREG
2629 rtx subreg = operand_subword (dst, first_subword, 0, mode); local
2630 if (reg_overlap_mentioned_p (subreg, src))
2725 if (GET_CODE (dst) == SUBREG
2733 if (GET_CODE (src1) == SUBREG
2739 if (GET_CODE (src2) == SUBREG
3175 while (op && GET_CODE (op) == SUBREG)
3202 (subreg (and (plus (reg imm_op)) 2^k-1) 7)
3203 where subreg, and and plus are optional.
3213 /* Strip subreg. *
    [all...]
  /src/external/gpl3/gcc/dist/gcc/config/s390/
s390.cc 1754 if (GET_CODE (inner) == SUBREG
2776 rtx subreg = operand_subword (dst, first_subword, 0, mode); local
2777 if (reg_overlap_mentioned_p (subreg, src))
2872 if (GET_CODE (dst) == SUBREG
2880 if (GET_CODE (src1) == SUBREG
2886 if (GET_CODE (src2) == SUBREG
3322 while (op && GET_CODE (op) == SUBREG)
3349 (subreg (and (plus (reg imm_op)) 2^k-1) 7)
3350 where subreg, and and plus are optional.
3360 /* Strip subreg. *
    [all...]

Completed in 129 milliseconds

1 2