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  /src/external/gpl3/gcc.old/dist/gcc/config/riscv/
riscv.cc 5206 rtx uimm_mask = force_reg (SImode, gen_int_mode (-IMM_REACH, SImode));
5210 emit_insn (gen_one_cmplsi2 (imm12_mask, uimm_mask));
5218 uimm_mask);
5230 uimm_mask);
5203 rtx uimm_mask = force_reg (SImode, gen_int_mode (-IMM_REACH, SImode)); local

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