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  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm_pp_smu.c 344 struct amd_pp_simple_clock_info validation_clks = { 0 }; local in function:dm_pp_get_clock_levels_by_type
367 pp_handle, &validation_clks)) {
370 validation_clks.engine_max_clock = 72000;
371 validation_clks.memory_max_clock = 80000;
372 validation_clks.level = 0;
375 if (smu_get_max_high_clocks(&adev->smu, &validation_clks)) {
377 validation_clks.engine_max_clock = 72000;
378 validation_clks.memory_max_clock = 80000;
379 validation_clks.level = 0;
385 validation_clks.engine_max_clock)
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