| /src/sys/arch/powerpc/include/ |
| reg.h | 70 struct vreg { /* Vector registers */ struct
71 uint32_t vreg[32][4]; member in struct:vreg
|
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| altivec_registers.h | 30 } vreg; typedef in typeref:union:__anon19868
36 vreg vr[32];
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| altivec_registers.h | 30 } vreg; typedef in typeref:union:__anon22607
36 vreg vr[32];
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| debugfs.c | 44 u32 vreg; member in struct:diff_mmio
69 u32 preg, vreg; local
72 vreg = vgpu_vreg(param->vgpu, offset);
74 if (preg != vreg) {
81 node->vreg = vreg;
119 u32 diff = node->preg ^ node->vreg;
122 node->offset, node->preg, node->vreg,
|
| gvt.h | 98 void *vreg; member in struct:intel_vgpu_mmio
448 (*(u32 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
450 (*(u32 *)(vgpu->mmio.vreg + (offset)))
452 (*(u64 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
454 (*(u64 *)(vgpu->mmio.vreg + (offset)))
|
| /src/external/gpl3/gdb/dist/gdb/ |
| ppc-sysv-tdep.c | 103 int vreg = 2; local
438 if (vreg <= 13)
441 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg,
443 vreg++;
466 if (vreg <= 13)
469 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val);
470 vreg++;
489 "greg" and not a "vreg" is consumed here. A cooked
1255 int vreg; member in struct:ppc64_sysv_argpos
1431 if (argpos->regcache && argpos->vreg <= 13
[all...] |
| /src/external/gpl3/gdb.old/dist/gdb/ |
| ppc-sysv-tdep.c | 103 int vreg = 2; local
438 if (vreg <= 13)
441 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg,
443 vreg++;
466 if (vreg <= 13)
469 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val);
470 vreg++;
489 "greg" and not a "vreg" is consumed here. A cooked
1255 int vreg; member in struct:ppc64_sysv_argpos
1431 if (argpos->regcache && argpos->vreg <= 13
[all...] |
| /src/external/bsd/byacc/dist/test/yacc/ |
| calc1.tab.c | 126 INTERVAL vreg[26]; variable
176 #define VREG 258
304 NULL,NULL,NULL,NULL,NULL,NULL,NULL,"DREG","VREG","CONST","UMINUS",NULL,NULL,
314 "line : VREG '=' vexp '\\n'",
326 "vexp : VREG",
401 return (VREG);
730 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
813 yyval.vval = vreg[yystack.l_mark[0].ival];
|
| varsyntax_calc1.tab.c | 127 INTERVAL vreg[26]; variable
138 int ival; /* dreg & vreg array index values*/
177 #define VREG 258
305 NULL,NULL,NULL,NULL,NULL,NULL,NULL,"DREG","VREG","CONST","UMINUS",NULL,NULL,
315 "line : VREG '=' vexp '\\n'",
327 "vexp : VREG",
402 return (VREG);
731 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
814 yyval.vval = vreg[yystack.l_mark[0].ival];
|
| /src/external/bsd/byacc/dist/test/btyacc/ |
| btyacc_calc1.tab.c | 143 INTERVAL vreg[26]; variable
197 #define VREG 258
369 NULL,NULL,NULL,NULL,NULL,"error","DREG","VREG","CONST","UMINUS","$accept",
380 "line : VREG '=' vexp",
391 "vexp : VREG",
519 return (VREG);
1406 vreg[yystack.l_mark[-2].ival] = yystack.l_mark[0].vval;
1492 yyval.vval = vreg[yystack.l_mark[0].ival];
|
| calc1.tab.c | 146 INTERVAL vreg[26]; variable
196 #define VREG 258
373 NULL,NULL,NULL,NULL,NULL,"error","DREG","VREG","CONST","UMINUS","$accept",
383 "line : VREG '=' vexp '\\n'",
395 "vexp : VREG",
562 return (VREG);
1362 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
1445 yyval.vval = vreg[yystack.l_mark[0].ival];
|
| varsyntax_calc1.tab.c | 147 INTERVAL vreg[26]; variable
158 int ival; /* dreg & vreg array index values*/
197 #define VREG 258
374 NULL,NULL,NULL,NULL,NULL,"error","DREG","VREG","CONST","UMINUS","$accept",
384 "line : VREG '=' vexp '\\n'",
396 "vexp : VREG",
563 return (VREG);
1363 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
1446 yyval.vval = vreg[yystack.l_mark[0].ival];
|
| /src/external/cddl/osnet/dev/dtrace/x86/ |
| dis_tables.c | 2958 dis_gather_regs_t *vreg; local
4885 vreg = &dis_vgather[opcode2][vex_W][vex_L];
4890 vreg->dgr_suffix, OPLEN - strlen(dp->it_name));
4896 dtrace_get_operand(x, REG_ONLY, reg, vreg->dgr_arg2, 2);
4901 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), vreg->dgr_arg0,
4903 dtrace_get_operand(x, mode, r_m, vreg->dgr_arg1, 1);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/gcn/ |
| gcn.cc | 2717 rtx vreg = gen_rtx_REG (V64SImode, local
2723 emit_insn (gen_vec_setv64si (vreg, reg, GEN_INT (lane)));
2727 emit_insn (gen_vec_extractv64sisi (reg, vreg, GEN_INT (lane)));
|
| /src/external/gpl3/gcc/dist/gcc/config/gcn/ |
| gcn.cc | 3135 rtx vreg = gen_rtx_REG (V64SImode, local
3141 emit_insn (gen_vec_setv64si (vreg, reg, GEN_INT (lane)));
3145 emit_insn (gen_vec_extractv64sisi (reg, vreg, GEN_INT (lane)));
|
