| intel_display_power.c | 192 WARN(!power_well->count, "Use count on power well %s is already zero",
246 * threads can't disable the power well while the caller tries to read a few
268 * Starting with Haswell, we have a "Power Down Well" that can be turned off
269 * when not needed anymore. We have 4 registers that can request the power well
301 DRM_DEBUG_KMS("%s power well enable timeout\n",
336 * - a KVMR request on any power well via the KVMR request register
375 * before enabling the power well and PW1/PG1's own fuse
594 * We should only use the power well if we explicitly asked the hardware to
631 "Power well 2 on.\n");
870 * the first power well and hope the WARN gets reported so we can fi
4762 struct i915_power_well *well; local in function:skl_display_core_init
4791 struct i915_power_well *well; local in function:skl_display_core_uninit
4821 struct i915_power_well *well; local in function:bxt_display_core_init
4852 struct i915_power_well *well; local in function:bxt_display_core_uninit
4880 struct i915_power_well *well; local in function:cnl_display_core_init
4912 struct i915_power_well *well; local in function:cnl_display_core_uninit
4994 struct i915_power_well *well; local in function:icl_display_core_init
5033 struct i915_power_well *well; local in function:icl_display_core_uninit
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